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git01.mediatek.com / filogic / uboot / b00c3e37408e2b150fa85cd4fb3a1adc74f733e8 / . / arch / arm / dts / tegra30-htc-endeavoru.dts
blob: 8a0ba3c07cc4838168e9e7d5e9bf180de6e2294e [file] [log] [blame]
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4/* This dts file describes the HTC One X smartphone */
5/* CPU Speedo ID 4, Soc Speedo ID 1, CPU Process: 1, Core Process: 0 */
6
7#include <dt-bindings/input/input.h>
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]8#include "tegra30.dtsi"
9
10/ {
11 model = "HTC One X";
12 compatible = "htc,endeavoru", "nvidia,tegra30";
13
14 chosen {
15 stdout-path = &uarta;
16 };
17
18 aliases {
19 i2c0 = &pwr_i2c;
20
21 mmc0 = &sdmmc4; /* eMMC */
22
23 rtc0 = &pmic;
24 rtc1 = "/rtc@7000e000";
25
26 usb0 = &micro_usb;
27 };
28
29 memory {
30 device_type = "memory";
31 reg = <0x80000000 0x40000000>;
32 };
33
34 host1x@50000000 {
35 dc@54200000 {
36 clocks = <&tegra_car TEGRA30_CLK_DISP1>,
37 <&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
38
39 rgb {
40 status = "okay";
41
42 nvidia,panel = <&dsia>;
43 };
44 };
45
46 dsia: dsi@54300000 {
47 status = "okay";
48
49 avdd-dsi-csi-supply = <&avdd_dsi_csi>;
50
Svyatoslav Ryhelb00c3e32024-11-24 14:06:32 +0200[diff] [blame^]51 panel@0 {
52 compatible = "htc,edge-panel";
53 reg = <0>;
54
55 reset-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
56
57 vdd-supply = <&vdd_3v3_panel>;
58 vddio-supply = <&vdd_1v8_panel>;
59
60 backlight = <&backlight>;
61 };
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]62 };
63 };
64
Svyatoslav Ryhel3135d862023-11-28 13:43:31 +0200[diff] [blame]65 pinmux@70000868 {
66 pinctrl-names = "default";
67 pinctrl-0 = <&state_default>;
68
69 state_default: pinmux {
70 /* PORT A */
71 clk_32k_out {
72 nvidia,pins = "clk_32k_out_pa0";
73 nvidia,function = "blink";
74 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
75 nvidia,tristate = <TEGRA_PIN_DISABLE>;
76 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
77 };
78 bt_uart_cts {
79 nvidia,pins = "uart3_cts_n_pa1";
80 nvidia,function = "uartc";
81 nvidia,pull = <TEGRA_PIN_PULL_UP>;
82 nvidia,tristate = <TEGRA_PIN_DISABLE>;
83 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
84 };
85 aud_aic3008_i2s {
86 nvidia,pins = "dap2_fs_pa2",
87 "dap2_sclk_pa3",
88 "dap2_din_pa4",
89 "dap2_dout_pa5";
90 nvidia,function = "i2s1";
91 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
92 nvidia,tristate = <TEGRA_PIN_DISABLE>;
93 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
94 };
95 wifi_sdio_clock {
96 nvidia,pins = "sdmmc3_clk_pa6";
97 nvidia,function = "sdmmc3";
98 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
99 nvidia,tristate = <TEGRA_PIN_DISABLE>;
100 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
101 };
102 wifi_sdio_command {
103 nvidia,pins = "sdmmc3_cmd_pa7";
104 nvidia,function = "sdmmc3";
105 nvidia,pull = <TEGRA_PIN_PULL_UP>;
106 nvidia,tristate = <TEGRA_PIN_DISABLE>;
107 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
108 };
109
110 /* PORT B */
111 mdm_imc_uart {
112 nvidia,pins = "gmi_a17_pb0",
113 "gmi_a18_pb1";
114 nvidia,function = "uartd";
115 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
116 nvidia,tristate = <TEGRA_PIN_DISABLE>;
117 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
118 };
119 aud_3v3_en {
120 nvidia,pins = "lcd_pwr0_pb2",
121 "lcd_pclk_pb3";
122 nvidia,function = "displaya";
123 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
124 nvidia,tristate = <TEGRA_PIN_DISABLE>;
125 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
126 };
127 wifi_sdio_data {
128 nvidia,pins = "sdmmc3_dat3_pb4",
129 "sdmmc3_dat2_pb5",
130 "sdmmc3_dat1_pb6",
131 "sdmmc3_dat0_pb7";
132 nvidia,function = "sdmmc3";
133 nvidia,pull = <TEGRA_PIN_PULL_UP>;
134 nvidia,tristate = <TEGRA_PIN_DISABLE>;
135 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
136 };
137
138 /* PORT C */
139 bt_uart_rts {
140 nvidia,pins = "uart3_rts_n_pc0";
141 nvidia,function = "uartc";
142 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
143 nvidia,tristate = <TEGRA_PIN_DISABLE>;
144 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
145 };
146 mdm_ap2bb_rst_pwrdwn {
147 nvidia,pins = "lcd_pwr1_pc1";
148 nvidia,function = "rsvd4";
149 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
150 nvidia,tristate = <TEGRA_PIN_DISABLE>;
151 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
152 };
153 cam_spi_clk_do {
154 nvidia,pins = "uart2_txd_pc2",
155 "uart2_rxd_pc3";
156 nvidia,function = "spi4";
157 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
158 nvidia,tristate = <TEGRA_PIN_DISABLE>;
159 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
160 };
161 per_sensor_i2c {
162 nvidia,pins = "gen1_i2c_scl_pc4",
163 "gen1_i2c_sda_pc5";
164 nvidia,function = "i2c1";
165 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
166 nvidia,tristate = <TEGRA_PIN_DISABLE>;
167 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
168 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
169 };
170 mdm_ap2bb_slave_wakeup {
171 nvidia,pins = "lcd_pwr2_pc6";
172 nvidia,function = "displaya";
173 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
174 nvidia,tristate = <TEGRA_PIN_DISABLE>;
175 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
176 };
177 mhl_int {
178 nvidia,pins = "gmi_wp_n_pc7";
179 nvidia,function = "rsvd1";
180 nvidia,pull = <TEGRA_PIN_PULL_UP>;
181 nvidia,tristate = <TEGRA_PIN_DISABLE>;
182 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
183 };
184
185 /* PORT D */
186 sdmmc3_data {
187 nvidia,pins = "sdmmc3_dat5_pd0",
188 "sdmmc3_dat4_pd1";
189 nvidia,function = "sdmmc3";
190 nvidia,pull = <TEGRA_PIN_PULL_UP>;
191 nvidia,tristate = <TEGRA_PIN_DISABLE>;
192 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
193 };
194 aud_1v8_en {
195 nvidia,pins = "lcd_dc1_pd2";
196 nvidia,function = "rsvd4";
197 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
198 nvidia,tristate = <TEGRA_PIN_DISABLE>;
199 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
200 };
201 sdmmc3_dat6_pd3 {
202 nvidia,pins = "sdmmc3_dat6_pd3",
203 "sdmmc3_dat7_pd4";
204 nvidia,function = "rsvd1";
205 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
206 nvidia,tristate = <TEGRA_PIN_DISABLE>;
207 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
208 };
209
210 /* PORT E */
211 mhl_usb_sel {
212 nvidia,pins = "lcd_d0_pe0";
213 nvidia,function = "displaya";
214 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
215 nvidia,tristate = <TEGRA_PIN_DISABLE>;
216 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
217 };
218 lcd_d1_pe1 {
219 nvidia,pins = "lcd_d1_pe1";
220 nvidia,function = "displaya";
221 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
222 nvidia,tristate = <TEGRA_PIN_DISABLE>;
223 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
224 };
225 peh_cap_int {
226 nvidia,pins = "lcd_d2_pe2";
227 nvidia,function = "rsvd3";
228 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
229 nvidia,tristate = <TEGRA_PIN_DISABLE>;
230 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
231 };
232 mhl_1v2_en {
233 nvidia,pins = "lcd_d3_pe3",
234 "lcd_d4_pe4";
235 nvidia,function = "displaya";
236 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
237 nvidia,tristate = <TEGRA_PIN_DISABLE>;
238 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
239 };
240 dsp_lcm_1v8_en {
241 nvidia,pins = "lcd_d5_pe5";
242 nvidia,function = "displaya";
243 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
244 nvidia,tristate = <TEGRA_PIN_DISABLE>;
245 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
246 };
247 mhl_rst {
248 nvidia,pins = "lcd_d6_pe6";
249 nvidia,function = "rsvd3";
250 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
251 nvidia,tristate = <TEGRA_PIN_DISABLE>;
252 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
253 };
254 peh_vibrator_on {
255 nvidia,pins = "lcd_d7_pe7";
256 nvidia,function = "displaya";
257 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
258 nvidia,tristate = <TEGRA_PIN_DISABLE>;
259 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
260 };
261
262 /* PORT F */
263 cam_vcm_2v85_pwr {
264 nvidia,pins = "lcd_d8_pf0";
265 nvidia,function = "rsvd4";
266 nvidia,pull = <TEGRA_PIN_PULL_UP>;
267 nvidia,tristate = <TEGRA_PIN_DISABLE>;
268 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
269 };
270 lcd_d9_d13 {
271 nvidia,pins = "lcd_d9_pf1",
272 "lcd_d10_pf2",
273 "lcd_d11_pf3",
274 "lcd_d12_pf4",
275 "lcd_d13_pf5";
276 nvidia,function = "displaya";
277 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
278 nvidia,tristate = <TEGRA_PIN_DISABLE>;
279 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
280 };
281 cam_cam2_core_1v8_en {
282 nvidia,pins = "lcd_d14_pf6";
283 nvidia,function = "rsvd4";
284 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
285 nvidia,tristate = <TEGRA_PIN_DISABLE>;
286 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
287 };
288 sys_pmu_msecure {
289 nvidia,pins = "lcd_d15_pf7";
290 nvidia,function = "rsvd4";
291 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
292 nvidia,tristate = <TEGRA_PIN_DISABLE>;
293 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
294 };
295
296 /* PORT G */
297 bootstraps {
298 nvidia,pins = "gmi_ad0_pg0",
299 "gmi_ad1_pg1",
300 "gmi_ad2_pg2",
301 "gmi_ad3_pg3",
302 "gmi_ad4_pg4",
303 "gmi_ad5_pg5",
304 "gmi_ad6_pg6",
305 "gmi_ad7_pg7";
306 nvidia,function = "rsvd4";
307 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
308 nvidia,tristate = <TEGRA_PIN_DISABLE>;
309 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
310 };
311
312 /* PORT H */
313 haptic_pwm {
314 nvidia,pins = "gmi_ad8_ph0";
315 nvidia,function = "pwm0";
316 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
317 nvidia,tristate = <TEGRA_PIN_DISABLE>;
318 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
319 };
320 gmi_ad9 {
321 nvidia,pins = "gmi_ad9_ph1";
322 nvidia,function = "rsvd4";
323 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
324 nvidia,tristate = <TEGRA_PIN_DISABLE>;
325 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
326 };
327 gmi_ad10 {
328 nvidia,pins = "gmi_ad10_ph2";
329 nvidia,function = "nand";
330 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
331 nvidia,tristate = <TEGRA_PIN_DISABLE>;
332 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
333 };
334 dsp_tp_rst {
335 nvidia,pins = "gmi_ad11_ph3",
336 "gmi_ad12_ph4",
337 "gmi_ad13_ph5",
338 "gmi_ad14_ph6";
339 nvidia,function = "rsvd4";
340 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
341 nvidia,tristate = <TEGRA_PIN_DISABLE>;
342 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
343 };
344 gmi_ad15 {
345 nvidia,pins = "gmi_ad15_ph7";
346 nvidia,function = "nand";
347 nvidia,pull = <TEGRA_PIN_PULL_UP>;
348 nvidia,tristate = <TEGRA_PIN_ENABLE>;
349 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
350 };
351
352 /* PORT I */
353 gmi_wr_n {
354 nvidia,pins = "gmi_wr_n_pi0",
355 "gmi_oe_n_pi1",
356 "gmi_dqs_pi2",
357 "gmi_cs6_n_pi3";
358 nvidia,function = "rsvd4";
359 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
360 nvidia,tristate = <TEGRA_PIN_DISABLE>;
361 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
362 };
363 gmi_rst_n_pi4 {
364 nvidia,pins = "gmi_rst_n_pi4";
365 nvidia,function = "rsvd4";
366 nvidia,pull = <TEGRA_PIN_PULL_UP>;
367 nvidia,tristate = <TEGRA_PIN_ENABLE>;
368 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
369 };
370 sim_detect {
371 nvidia,pins = "gmi_iordy_pi5";
372 nvidia,function = "rsvd1";
373 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
374 nvidia,tristate = <TEGRA_PIN_ENABLE>;
375 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
376 };
377 peh_gyr_int {
378 nvidia,pins = "gmi_cs7_n_pi6",
379 "gmi_wait_pi7";
380 nvidia,function = "rsvd4";
381 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
382 nvidia,tristate = <TEGRA_PIN_DISABLE>;
383 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
384 };
385
386 /* PORT J */
387 mdm_bb2ap_host_wakeup {
388 nvidia,pins = "gmi_cs0_n_pj0";
389 nvidia,function = "gmi";
390 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
391 nvidia,tristate = <TEGRA_PIN_DISABLE>;
392 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
393 };
394 dsp_lcm_de {
395 nvidia,pins = "lcd_de_pj1";
396 nvidia,function = "displaya";
397 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
398 nvidia,tristate = <TEGRA_PIN_DISABLE>;
399 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
400 };
401 peh_comp_int {
402 nvidia,pins = "gmi_cs1_n_pj2";
403 nvidia,function = "rsvd1";
404 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
405 nvidia,tristate = <TEGRA_PIN_DISABLE>;
406 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
407 };
408 lcd_hsync {
409 nvidia,pins = "lcd_hsync_pj3";
410 nvidia,function = "displaya";
411 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
412 nvidia,tristate = <TEGRA_PIN_DISABLE>;
413 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
414 };
415 mdm_ap_usb_uart_oe {
416 nvidia,pins = "lcd_vsync_pj4";
417 nvidia,function = "displaya";
418 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
419 nvidia,tristate = <TEGRA_PIN_DISABLE>;
420 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
421 };
422 mcam_spi_di_cs0 {
423 nvidia,pins = "uart2_cts_n_pj5",
424 "uart2_rts_n_pj6";
425 nvidia,function = "spi4";
426 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
427 nvidia,tristate = <TEGRA_PIN_DISABLE>;
428 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
429 };
430 mdm_tx {
431 nvidia,pins = "gmi_a16_pj7";
432 nvidia,function = "uartd";
433 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
434 nvidia,tristate = <TEGRA_PIN_DISABLE>;
435 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
436 };
437
438 /* PORT K */
439 gmi_adv_n {
440 nvidia,pins = "gmi_adv_n_pk0",
441 "gmi_clk_pk1",
442 "gmi_cs2_n_pk3";
443 nvidia,function = "rsvd4";
444 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
445 nvidia,tristate = <TEGRA_PIN_DISABLE>;
446 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
447 };
448 gmi_cs4_n {
449 nvidia,pins = "gmi_cs4_n_pk2";
450 nvidia,function = "rsvd4";
451 nvidia,pull = <TEGRA_PIN_PULL_UP>;
452 nvidia,tristate = <TEGRA_PIN_DISABLE>;
453 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
454 };
455 gmi_cs3_n {
456 nvidia,pins = "gmi_cs3_n_pk4";
457 nvidia,function = "rsvd1";
458 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
459 nvidia,tristate = <TEGRA_PIN_DISABLE>;
460 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
461 };
462 spdif_out {
463 nvidia,pins = "spdif_out_pk5";
464 nvidia,function = "spdif";
465 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
466 nvidia,tristate = <TEGRA_PIN_ENABLE>;
467 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
468 };
469 spdif_in {
470 nvidia,pins = "spdif_in_pk6";
471 nvidia,function = "spdif";
472 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
473 nvidia,tristate = <TEGRA_PIN_ENABLE>;
474 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
475 };
476 mdm_rts {
477 nvidia,pins = "gmi_a19_pk7";
478 nvidia,function = "uartd";
479 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
480 nvidia,tristate = <TEGRA_PIN_DISABLE>;
481 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
482 };
483
484 /* PORT L */
485 port_l {
486 nvidia,pins = "vi_d2_pl0",
487 "vi_d3_pl1",
488 "vi_d4_pl2",
489 "vi_d5_pl3",
490 "vi_d6_pl4",
491 "vi_d7_pl5",
492 "vi_d8_pl6",
493 "vi_d9_pl7";
494 nvidia,function = "sdmmc2";
495 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
496 nvidia,tristate = <TEGRA_PIN_DISABLE>;
497 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
498 };
499
500 /* PORT M */
501 dsp_lcd_id {
502 nvidia,pins = "lcd_d16_pm0",
503 "lcd_d17_pm1";
504 nvidia,function = "displaya";
505 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
506 nvidia,tristate = <TEGRA_PIN_DISABLE>;
507 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
508 };
509 front_cam_rst {
510 nvidia,pins = "lcd_d18_pm2";
511 nvidia,function = "rsvd4";
512 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
513 nvidia,tristate = <TEGRA_PIN_DISABLE>;
514 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
515 };
516 mdm_v_dcin_modem_en {
517 nvidia,pins = "lcd_d19_pm3",
518 "lcd_d20_pm4";
519 nvidia,function = "rsvd4";
520 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
521 nvidia,tristate = <TEGRA_PIN_DISABLE>;
522 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
523 };
524 nfc_pins {
525 nvidia,pins = "lcd_d21_pm5",
526 "lcd_d22_pm6";
527 nvidia,function = "rsvd4";
528 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
529 nvidia,tristate = <TEGRA_PIN_DISABLE>;
530 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
531 };
532 cam_vaa_2v85_en {
533 nvidia,pins = "lcd_d23_pm7";
534 nvidia,function = "rsvd4";
535 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
536 nvidia,tristate = <TEGRA_PIN_DISABLE>;
537 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
538 };
539
540 /* PORT N */
541 mdm_ap2bb_rst_host_pwr {
542 nvidia,pins = "dap1_fs_pn0",
543 "dap1_din_pn1",
544 "dap1_sclk_pn3";
545 nvidia,function = "i2s0";
546 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
547 nvidia,tristate = <TEGRA_PIN_ENABLE>;
548 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
549 };
550 mdm_bb_fatal_int {
551 nvidia,pins = "dap1_dout_pn2";
552 nvidia,function = "i2s0";
553 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
554 nvidia,tristate = <TEGRA_PIN_ENABLE>;
555 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
556 };
557 lcd_cs0_n {
558 nvidia,pins = "lcd_cs0_n_pn4";
559 nvidia,function = "rsvd4";
560 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
561 nvidia,tristate = <TEGRA_PIN_DISABLE>;
562 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
563 };
564 lcd_sdout {
565 nvidia,pins = "lcd_sdout_pn5";
566 nvidia,function = "displaya";
567 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
568 nvidia,tristate = <TEGRA_PIN_DISABLE>;
569 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
570 };
571 dsp_lcd_rst {
572 nvidia,pins = "lcd_dc0_pn6";
573 nvidia,function = "displaya";
574 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
575 nvidia,tristate = <TEGRA_PIN_DISABLE>;
576 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
577 };
578 mhl_hpd {
579 nvidia,pins = "hdmi_int_pn7";
580 nvidia,function = "rsvd1";
581 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
582 nvidia,tristate = <TEGRA_PIN_ENABLE>;
583 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
584 };
585
586 /* PORT O */
587 ap_usb_uart_sel {
588 nvidia,pins = "ulpi_data7_po0";
589 nvidia,function = "spi2";
590 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
591 nvidia,tristate = <TEGRA_PIN_DISABLE>;
592 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
593 };
594 bsp_ap_debug_tx {
595 nvidia,pins = "ulpi_data0_po1";
596 nvidia,function = "uarta";
597 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
598 nvidia,tristate = <TEGRA_PIN_DISABLE>;
599 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
600 };
601 bsp_ap_debug_rx {
602 nvidia,pins = "ulpi_data1_po2";
603 nvidia,function = "uarta";
604 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
605 nvidia,tristate = <TEGRA_PIN_DISABLE>;
606 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
607 };
608 ulpi_data2 {
609 nvidia,pins = "ulpi_data2_po3";
610 nvidia,function = "spi3";
611 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
612 nvidia,tristate = <TEGRA_PIN_DISABLE>;
613 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
614 };
615 con_wifi_irq {
616 nvidia,pins = "ulpi_data3_po4";
617 nvidia,function = "hsi";
618 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
619 nvidia,tristate = <TEGRA_PIN_DISABLE>;
620 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
621 };
622 per_gsensor_int {
623 nvidia,pins = "ulpi_data4_po5";
624 nvidia,function = "ulpi";
625 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
626 nvidia,tristate = <TEGRA_PIN_DISABLE>;
627 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
628 };
629 ulpi_data5_data6 {
630 nvidia,pins = "ulpi_data5_po6",
631 "ulpi_data6_po7";
632 nvidia,function = "ulpi";
633 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
634 nvidia,tristate = <TEGRA_PIN_DISABLE>;
635 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
636 };
637
638 /* PORT P */
639 aud_ap_pcm {
640 nvidia,pins = "dap3_fs_pp0",
641 "dap3_din_pp1",
642 "dap3_dout_pp2",
643 "dap3_sclk_pp3";
644 nvidia,function = "i2s2";
645 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
646 nvidia,tristate = <TEGRA_PIN_DISABLE>;
647 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
648 };
649 aud_btpcm {
650 nvidia,pins = "dap4_fs_pp4",
651 "dap4_din_pp5";
652 nvidia,function = "i2s3";
653 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
654 nvidia,tristate = <TEGRA_PIN_DISABLE>;
655 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
656 };
657 aud_ext {
658 nvidia,pins = "dap4_dout_pp6",
659 "dap4_sclk_pp7";
660 nvidia,function = "rsvd4";
661 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
662 nvidia,tristate = <TEGRA_PIN_DISABLE>;
663 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
664 };
665
666 /* PORT Q */
667 port_q {
668 nvidia,pins = "kb_col0_pq0",
669 "kb_col1_pq1",
670 "kb_col2_pq2",
671 "kb_col3_pq3",
672 "kb_col4_pq4",
673 "kb_col5_pq5",
674 "kb_col6_pq6",
675 "kb_col7_pq7";
676 nvidia,function = "kbc";
677 nvidia,pull = <TEGRA_PIN_PULL_UP>;
678 nvidia,tristate = <TEGRA_PIN_DISABLE>;
679 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
680 };
681
682 /* PORT R */
683 raw_intr0 {
684 nvidia,pins = "kb_row0_pr0";
685 nvidia,function = "kbc";
686 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
687 nvidia,tristate = <TEGRA_PIN_ENABLE>;
688 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
689 };
690 per_torch_en {
691 nvidia,pins = "kb_row1_pr1";
692 nvidia,function = "kbc";
693 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
694 nvidia,tristate = <TEGRA_PIN_DISABLE>;
695 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
696 };
697 gyro_pwr {
698 nvidia,pins = "kb_row2_pr2";
699 nvidia,function = "rsvd4";
700 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
701 nvidia,tristate = <TEGRA_PIN_DISABLE>;
702 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
703 };
704 haptic_en {
705 nvidia,pins = "kb_row3_pr3";
706 nvidia,function = "rsvd3";
707 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
708 nvidia,tristate = <TEGRA_PIN_DISABLE>;
709 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
710 };
711 kb_row4_row5 {
712 nvidia,pins = "kb_row4_pr4",
713 "kb_row5_pr5";
714 nvidia,function = "rsvd4";
715 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
716 nvidia,tristate = <TEGRA_PIN_DISABLE>;
717 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
718 };
719 cam_id {
720 nvidia,pins = "kb_row6_pr6",
721 "kb_row7_pr7";
722 nvidia,function = "kbc";
723 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
724 nvidia,tristate = <TEGRA_PIN_ENABLE>;
725 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
726 };
727
728 /* PORT S */
729 dsp_vol_up {
730 nvidia,pins = "kb_row8_ps0";
731 nvidia,function = "kbc";
732 nvidia,pull = <TEGRA_PIN_PULL_UP>;
733 nvidia,tristate = <TEGRA_PIN_DISABLE>;
734 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
735 };
736 con_usb_id_1 {
737 nvidia,pins = "kb_row9_ps1",
738 "kb_row10_ps2";
739 nvidia,function = "kbc";
740 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
741 nvidia,tristate = <TEGRA_PIN_DISABLE>;
742 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
743 };
744 port_s {
745 nvidia,pins = "kb_row11_ps3",
746 "kb_row12_ps4",
747 "kb_row13_ps5",
748 "kb_row14_ps6",
749 "kb_row15_ps7";
750 nvidia,function = "kbc";
751 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
752 nvidia,tristate = <TEGRA_PIN_DISABLE>;
753 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
754 };
755
756 /* PORT T */
757 dsp_tw_i2c {
758 nvidia,pins = "gen2_i2c_scl_pt5",
759 "gen2_i2c_sda_pt6";
760 nvidia,function = "i2c2";
761 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
762 nvidia,tristate = <TEGRA_PIN_DISABLE>;
763 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
764 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
765 };
766 per_emmc_cmd {
767 nvidia,pins = "sdmmc4_cmd_pt7";
768 nvidia,function = "sdmmc4";
769 nvidia,pull = <TEGRA_PIN_PULL_UP>;
770 nvidia,tristate = <TEGRA_PIN_DISABLE>;
771 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
772 };
773
774 /* PORT U */
775 con_bt_en {
776 nvidia,pins = "pu0", "pu1", "pu2",
777 "pu3", "pu4";
778 nvidia,function = "rsvd4";
779 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
780 nvidia,tristate = <TEGRA_PIN_DISABLE>;
781 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
782 };
783 per_capsensor_int_cpu {
784 nvidia,pins = "pu5";
785 nvidia,function = "rsvd4";
786 nvidia,pull = <TEGRA_PIN_PULL_UP>;
787 nvidia,tristate = <TEGRA_PIN_DISABLE>;
788 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
789 };
790 dsp_ap_kpdpwr {
791 nvidia,pins = "pu6";
792 nvidia,function = "pwm3";
793 nvidia,pull = <TEGRA_PIN_PULL_UP>;
794 nvidia,tristate = <TEGRA_PIN_ENABLE>;
795 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
796 };
797 jtag_rtck {
798 nvidia,pins = "jtag_rtck_pu7";
799 nvidia,function = "rtck";
800 nvidia,pull = <TEGRA_PIN_PULL_UP>;
801 nvidia,tristate = <TEGRA_PIN_DISABLE>;
802 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
803 };
804
805 /* PORT V */
806 mdm_bb2ap_suspend_req {
807 nvidia,pins = "pv0";
808 nvidia,function = "rsvd1";
809 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
810 nvidia,tristate = <TEGRA_PIN_DISABLE>;
811 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
812 };
813 dsp_tp_att {
814 nvidia,pins = "pv1";
815 nvidia,function = "rsvd1";
816 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
817 nvidia,tristate = <TEGRA_PIN_DISABLE>;
818 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
819 };
820 con_wifi_en {
821 nvidia,pins = "pv2", "pv3";
822 nvidia,function = "rsvd2";
823 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
824 nvidia,tristate = <TEGRA_PIN_DISABLE>;
825 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
826 };
827 mhl_ddc {
828 nvidia,pins = "ddc_scl_pv4",
829 "ddc_sda_pv5";
830 nvidia,function = "i2c4";
831 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
832 nvidia,tristate = <TEGRA_PIN_DISABLE>;
833 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
834 };
835 crt_hsync {
836 nvidia,pins = "crt_hsync_pv6";
837 nvidia,function = "crt";
838 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
839 nvidia,tristate = <TEGRA_PIN_DISABLE>;
840 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
841 };
842 crt_vsync {
843 nvidia,pins = "crt_vsync_pv7";
844 nvidia,function = "rsvd4";
845 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
846 nvidia,tristate = <TEGRA_PIN_DISABLE>;
847 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
848 };
849
850 /* PORT W */
851 pwr_chg_stat {
852 nvidia,pins = "lcd_cs1_n_pw0";
853 nvidia,function = "rsvd4";
854 nvidia,pull = <TEGRA_PIN_PULL_UP>;
855 nvidia,tristate = <TEGRA_PIN_DISABLE>;
856 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
857 };
858 dsp_bl_pwm_cpu {
859 nvidia,pins = "lcd_m1_pw1";
860 nvidia,function = "displaya";
861 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
862 nvidia,tristate = <TEGRA_PIN_DISABLE>;
863 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
864 };
865 aud_hp_det {
866 nvidia,pins = "spi2_cs1_n_pw2";
867 nvidia,function = "spi2";
868 nvidia,pull = <TEGRA_PIN_PULL_UP>;
869 nvidia,tristate = <TEGRA_PIN_DISABLE>;
870 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
871 };
872 dsp_vol_down {
873 nvidia,pins = "spi2_cs2_n_pw3";
874 nvidia,function = "spi2";
875 nvidia,pull = <TEGRA_PIN_PULL_UP>;
876 nvidia,tristate = <TEGRA_PIN_ENABLE>;
877 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
878 };
879 aud_mclk {
880 nvidia,pins = "clk1_out_pw4";
881 nvidia,function = "rsvd4";
882 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
883 nvidia,tristate = <TEGRA_PIN_DISABLE>;
884 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
885 };
886 aud_aic3008_rst {
887 nvidia,pins = "clk2_out_pw5";
888 nvidia,function = "rsvd4";
889 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
890 nvidia,tristate = <TEGRA_PIN_DISABLE>;
891 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
892 };
893 con_bt_tx {
894 nvidia,pins = "uart3_txd_pw6";
895 nvidia,function = "uartc";
896 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
897 nvidia,tristate = <TEGRA_PIN_DISABLE>;
898 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
899 };
900 con_bt_rx {
901 nvidia,pins = "uart3_rxd_pw7";
902 nvidia,function = "uartc";
903 nvidia,pull = <TEGRA_PIN_PULL_UP>;
904 nvidia,tristate = <TEGRA_PIN_DISABLE>;
905 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
906 };
907
908 /* PORT X */
909 aud_spi_do {
910 nvidia,pins = "spi2_mosi_px0",
911 "spi2_sck_px2",
912 "spi2_cs0_n_px3";
913 nvidia,function = "spi2";
914 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
915 nvidia,tristate = <TEGRA_PIN_DISABLE>;
916 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
917 };
918 aud_spi_di {
919 nvidia,pins = "spi2_miso_px1";
920 nvidia,function = "spi2";
921 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
922 nvidia,tristate = <TEGRA_PIN_DISABLE>;
923 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
924 };
925 spi1_mosi {
926 nvidia,pins = "spi1_mosi_px4";
927 nvidia,function = "spi1";
928 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
929 nvidia,tristate = <TEGRA_PIN_DISABLE>;
930 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
931 };
932 pwr_chg_int {
933 nvidia,pins = "spi1_sck_px5";
934 nvidia,function = "spi2";
935 nvidia,pull = <TEGRA_PIN_PULL_UP>;
936 nvidia,tristate = <TEGRA_PIN_DISABLE>;
937 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
938 };
939 spi1_cs0_n {
940 nvidia,pins = "spi1_cs0_n_px6";
941 nvidia,function = "spi1";
942 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
943 nvidia,tristate = <TEGRA_PIN_DISABLE>;
944 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
945 };
946 audio_mclk_en {
947 nvidia,pins = "spi1_miso_px7";
948 nvidia,function = "rsvd4";
949 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
950 nvidia,tristate = <TEGRA_PIN_DISABLE>;
951 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
952 };
953
954 /* PORT Y */
955 led_drv_en_trig {
956 nvidia,pins = "ulpi_clk_py0",
957 "ulpi_dir_py1";
958 nvidia,function = "rsvd2";
959 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
960 nvidia,tristate = <TEGRA_PIN_DISABLE>;
961 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
962 };
963 mhl_3v3_en {
964 nvidia,pins = "ulpi_nxt_py2";
965 nvidia,function = "ulpi";
966 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
967 nvidia,tristate = <TEGRA_PIN_DISABLE>;
968 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
969 };
970 peh_v_srio_1v8_en {
971 nvidia,pins = "ulpi_stp_py3";
972 nvidia,function = "ulpi";
973 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
974 nvidia,tristate = <TEGRA_PIN_DISABLE>;
975 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
976 };
977 aud_remo_tx {
978 nvidia,pins = "sdmmc1_dat3_py4";
979 nvidia,function = "uarte";
980 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
981 nvidia,tristate = <TEGRA_PIN_DISABLE>;
982 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
983 };
984 aud_remo_rx {
985 nvidia,pins = "sdmmc1_dat2_py5";
986 nvidia,function = "uarte";
987 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
988 nvidia,tristate = <TEGRA_PIN_DISABLE>;
989 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
990 };
991 nfc_irq {
992 nvidia,pins = "sdmmc1_dat1_py6";
993 nvidia,function = "rsvd2";
994 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
995 nvidia,tristate = <TEGRA_PIN_ENABLE>;
996 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
997 };
998 testpoint1 {
999 nvidia,pins = "sdmmc1_dat0_py7";
1000 nvidia,function = "sdmmc1";
1001 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1002 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1003 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1004 };
1005
1006 /* PORT Z */
1007 aud_remo_oe {
1008 nvidia,pins = "sdmmc1_clk_pz0";
1009 nvidia,function = "sdmmc1";
1010 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1011 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1012 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1013 };
1014 testpoint2 {
1015 nvidia,pins = "sdmmc1_cmd_pz1";
1016 nvidia,function = "sdmmc1";
1017 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1018 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1019 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1020 };
1021 mdm_usb_uart_oe {
1022 nvidia,pins = "lcd_sdin_pz2";
1023 nvidia,function = "displaya";
1024 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1025 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1026 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1027 };
1028 lcd_wr_n {
1029 nvidia,pins = "lcd_wr_n_pz3";
1030 nvidia,function = "displaya";
1031 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1032 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1033 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1034 };
1035 lcd_sck {
1036 nvidia,pins = "lcd_sck_pz4";
1037 nvidia,function = "displaya";
1038 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1039 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1040 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1041 };
1042 sys_clk_req {
1043 nvidia,pins = "sys_clk_req_pz5";
1044 nvidia,function = "sysclk";
1045 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1046 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1047 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1048 };
1049 sys_pwr_i2c {
1050 nvidia,pins = "pwr_i2c_scl_pz6",
1051 "pwr_i2c_sda_pz7";
1052 nvidia,function = "i2cpwr";
1053 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1054 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1055 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1056 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1057 };
1058
1059 /* PORT AA */
1060 bsp_emmc {
1061 nvidia,pins = "sdmmc4_dat0_paa0",
1062 "sdmmc4_dat1_paa1",
1063 "sdmmc4_dat2_paa2",
1064 "sdmmc4_dat3_paa3",
1065 "sdmmc4_dat4_paa4",
1066 "sdmmc4_dat5_paa5",
1067 "sdmmc4_dat6_paa6",
1068 "sdmmc4_dat7_paa7";
1069 nvidia,function = "sdmmc4";
1070 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1071 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1072 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1073 };
1074
1075 /* PORT BB */
1076 cam1_rst {
1077 nvidia,pins = "pbb0";
1078 nvidia,function = "rsvd3";
1079 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1080 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1081 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1082 };
1083 cam_i2c {
1084 nvidia,pins = "cam_i2c_scl_pbb1",
1085 "cam_i2c_sda_pbb2";
1086 nvidia,function = "i2c3";
1087 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1088 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1089 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1090 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1091 };
1092 per_flash_en {
1093 nvidia,pins = "pbb3";
1094 nvidia,function = "vgp3";
1095 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1096 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1097 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1098 };
1099 cam_vddio_1v8_en {
1100 nvidia,pins = "pbb4";
1101 nvidia,function = "vgp4";
1102 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1103 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1104 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1105 };
1106 cam1_vcm_pd {
1107 nvidia,pins = "pbb5";
1108 nvidia,function = "vgp5";
1109 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1110 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1111 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1112 };
1113 aud_remo_pres {
1114 nvidia,pins = "pbb6";
1115 nvidia,function = "vgp6";
1116 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1117 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1118 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1119 };
1120 front_cam_standby {
1121 nvidia,pins = "pbb7";
1122 nvidia,function = "rsvd3";
1123 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1124 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1125 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1126 };
1127
1128 /* PORT CC */
1129 cam_mclk {
1130 nvidia,pins = "cam_mclk_pcc0";
1131 nvidia,function = "vi_alt3";
1132 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1133 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1134 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1135 };
1136 cam_sel {
1137 nvidia,pins = "pcc1";
1138 nvidia,function = "rsvd3";
1139 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1140 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1141 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1142 };
1143 pwr_themp_alert_int {
1144 nvidia,pins = "pcc2";
1145 nvidia,function = "rsvd3";
1146 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1147 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1148 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1149 };
1150 bsp_emmc_resout {
1151 nvidia,pins = "sdmmc4_rst_n_pcc3";
1152 nvidia,function = "rsvd2";
1153 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1154 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1155 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1156 };
1157 bsp_emmc_clk {
1158 nvidia,pins = "sdmmc4_clk_pcc4";
1159 nvidia,function = "sdmmc4";
1160 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1161 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1162 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1163 };
1164 aud_dock_out_en {
1165 nvidia,pins = "clk2_req_pcc5";
1166 nvidia,function = "rsvd4";
1167 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1168 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1169 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1170 };
1171
1172 /* PORT DD */
1173 /* PORT EE */
1174 clk3_out {
1175 nvidia,pins = "clk3_out_pee0";
1176 nvidia,function = "extperiph3";
1177 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1178 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1179 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1180 };
1181 raw_intr1 {
1182 nvidia,pins = "clk3_req_pee1";
1183 nvidia,function = "rsvd4";
1184 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1185 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1186 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1187 };
1188 clk1_req {
1189 nvidia,pins = "clk1_req_pee2";
1190 nvidia,function = "dap";
1191 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1192 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1193 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1194 };
1195 hdmi_cec {
1196 nvidia,pins = "hdmi_cec_pee3";
1197 nvidia,function = "cec";
1198 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1199 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1200 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1201 };
1202 owr {
1203 nvidia,pins = "owr";
1204 nvidia,function = "owr";
1205 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1206 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1207 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1208 };
1209 };
1210 };
1211
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1212 uarta: serial@70006000 {
1213 status = "okay";
1214 };
1215
1216 pwr_i2c: i2c@7000d000 {
1217 status = "okay";
1218 clock-frequency = <100000>;
1219
1220 /* Texas Instruments TPS80032 PMIC */
1221 pmic: tps80032@48 {
1222 compatible = "ti,tps80032";
1223 reg = <0x48>;
1224
Svyatoslav Ryheld27e0012023-10-03 09:36:39 +0300[diff] [blame]1225 ti,system-power-controller;
1226
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1227 regulators {
Svyatoslav Ryheld27e0012023-10-03 09:36:39 +0300[diff] [blame]1228 vdd_1v8_vio: smps5 {
1229 regulator-name = "vdd_1v8_gen";
1230 regulator-min-microvolt = <1800000>;
1231 regulator-max-microvolt = <1800000>;
1232 regulator-always-on;
1233 regulator-boot-on;
1234 };
1235
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1236 /* DSI VDD */
1237 avdd_dsi_csi: ldo1 {
1238 regulator-name = "avdd_dsi_csi";
1239 regulator-min-microvolt = <1200000>;
1240 regulator-max-microvolt = <1200000>;
Svyatoslav Ryhel8c8fb852023-08-26 18:35:35 +0300[diff] [blame]1241 regulator-boot-on;
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1242 };
1243 };
1244 };
1245 };
1246
1247 sdmmc4: sdhci@78000600 {
1248 status = "okay";
1249 bus-width = <8>;
1250 non-removable;
Svyatoslav Ryheld27e0012023-10-03 09:36:39 +0300[diff] [blame]1251
1252 vmmc-supply = <&vcore_emmc>;
1253 vqmmc-supply = <&vdd_1v8_vio>;
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1254 };
1255
1256 micro_usb: usb@7d000000 {
1257 status = "okay";
1258 dr_mode = "otg";
1259 };
1260
Svyatoslav Ryhel6c438612023-08-25 20:23:14 +0300[diff] [blame]1261 usb-phy@7d000000 {
1262 status = "okay";
1263 nvidia,hssync-start-delay = <0>;
1264 nvidia,xcvr-lsfslew = <2>;
1265 nvidia,xcvr-lsrslew = <2>;
1266 };
1267
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1268 backlight: backlight {
1269 compatible = "nvidia,tegra-pwm-backlight";
1270
1271 nvidia,pwm-source = <1>;
1272 nvidia,default-brightness = <0x8E>;
1273 };
1274
1275 /* PMIC has a built-in 32KHz oscillator which is used by PMC */
1276 clk32k_in: clock-32k {
1277 compatible = "fixed-clock";
1278 #clock-cells = <0>;
1279 clock-frequency = <32768>;
1280 clock-output-names = "pmic-oscillator";
1281 };
1282
1283 gpio-keys {
1284 compatible = "gpio-keys";
1285
1286 key-power {
1287 label = "Power";
1288 gpios = <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_LOW>;
1289 linux,code = <KEY_ENTER>;
1290 };
1291
1292 key-volume-up {
1293 label = "Volume Up";
1294 gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
1295 linux,code = <KEY_UP>;
1296 };
1297
1298 key-volume-down {
1299 label = "Volume Down";
1300 gpios = <&gpio TEGRA_GPIO(W, 3) GPIO_ACTIVE_LOW>;
1301 linux,code = <KEY_DOWN>;
1302 };
1303 };
1304
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1305 vcore_emmc: regulator-emmc {
1306 compatible = "regulator-fixed";
1307 regulator-name = "vdd_2v85_sdmmc";
1308 regulator-min-microvolt = <2850000>;
1309 regulator-max-microvolt = <2850000>;
1310 gpio = <&gpio TEGRA_GPIO(M, 3) GPIO_ACTIVE_HIGH>;
1311 enable-active-high;
1312 };
1313
1314 vdd_3v3_panel: regulator-lcm {
1315 compatible = "regulator-fixed";
1316 regulator-name = "v_lcm_3v3";
1317 regulator-min-microvolt = <3300000>;
1318 regulator-max-microvolt = <3300000>;
1319 gpio = <&gpio TEGRA_GPIO(E, 2) GPIO_ACTIVE_HIGH>;
1320 enable-active-high;
1321 };
1322
1323 vdd_1v8_panel: regulator-lcmio {
1324 compatible = "regulator-fixed";
1325 regulator-name = "v_lcmio_1v8";
1326 regulator-min-microvolt = <1800000>;
1327 regulator-max-microvolt = <1800000>;
1328 gpio = <&gpio TEGRA_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
1329 enable-active-high;
1330 };
1331};