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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ian Campbell6efe3692014-05-05 11:52:26 +01002/*
3 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * (C) Copyright 2007-2011
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * Tom Cubie <tangliang@allwinnertech.com>
8 *
9 * Configuration settings for the Allwinner sunxi series of boards.
Ian Campbell6efe3692014-05-05 11:52:26 +010010 */
11
12#ifndef _SUNXI_COMMON_CONFIG_H
13#define _SUNXI_COMMON_CONFIG_H
14
Hans de Goede22a1a532015-09-13 17:29:33 +020015#include <asm/arch/cpu.h>
Hans de Goeded241ecf2015-05-19 22:12:31 +020016#include <linux/stringify.h>
17
Andre Przywarad8362162017-04-26 01:32:48 +010018#ifdef CONFIG_ARM64
Jagan Tekia4e696b2017-11-10 22:21:09 +053019#define CONFIG_SYS_BOOTM_LEN (32 << 20)
Andre Przywarad8362162017-04-26 01:32:48 +010020#endif
21
Ian Campbell6efe3692014-05-05 11:52:26 +010022/* Serial & console */
Ian Campbell6efe3692014-05-05 11:52:26 +010023#define CONFIG_SYS_NS16550_SERIAL
24/* ns16550 reg in the low bits of cpu reg */
Icenowy Zhengb00ef022022-01-29 10:23:06 -050025#ifdef CONFIG_MACH_SUNIV
26/* suniv doesn't have apb2 and uart is connected to apb1 */
27#define CONFIG_SYS_NS16550_CLK 100000000
28#else
Ian Campbell6efe3692014-05-05 11:52:26 +010029#define CONFIG_SYS_NS16550_CLK 24000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050030#endif
Thomas Chou00ad1f02015-11-19 21:48:13 +080031#ifndef CONFIG_DM_SERIAL
Simon Glass66648982014-10-30 20:25:50 -060032# define CONFIG_SYS_NS16550_REG_SIZE -4
33# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
34# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
35# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
36# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
37# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
38#endif
Ian Campbell6efe3692014-05-05 11:52:26 +010039
Paul Kocialkowskide05f942015-05-16 19:52:11 +020040/* CPU */
Paul Kocialkowskide05f942015-05-16 19:52:11 +020041
Hans de Goeded241ecf2015-05-19 22:12:31 +020042/*
43 * The DRAM Base differs between some models. We cannot use macros for the
44 * CONFIG_FOO defines which contain the DRAM base address since they end
45 * up unexpanded in include/autoconf.mk .
46 *
47 * So we have to have this #ifdef #else #endif block for these.
48 */
49#ifdef CONFIG_MACH_SUN9I
50#define SDRAM_OFFSET(x) 0x2##x
51#define CONFIG_SYS_SDRAM_BASE 0x20000000
Icenowy Zhengb00ef022022-01-29 10:23:06 -050052#elif defined(CONFIG_MACH_SUNIV)
53#define SDRAM_OFFSET(x) 0x8##x
54#define CONFIG_SYS_SDRAM_BASE 0x80000000
Hans de Goeded241ecf2015-05-19 22:12:31 +020055#else
56#define SDRAM_OFFSET(x) 0x4##x
Ian Campbell6efe3692014-05-05 11:52:26 +010057#define CONFIG_SYS_SDRAM_BASE 0x40000000
Icenowy Zheng52e61882017-04-08 15:30:12 +080058/* V3s do not have enough memory to place code at 0x4a000000 */
Hans de Goeded241ecf2015-05-19 22:12:31 +020059#endif
60
Hans de Goede0b95a282015-05-20 15:27:16 +020061/*
62 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
63 * slightly bigger. Note that it is possible to map the first 32 KiB of the
64 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
65 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
66 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080067 * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
68 * is known yet.
69 * H6 has SRAM A1 at 0x00020000.
Hans de Goede0b95a282015-05-20 15:27:16 +020070 */
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080071#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
72/* FIXME: this may be larger on some SoCs */
73#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +010074
Ian Campbell6efe3692014-05-05 11:52:26 +010075#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
76#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
77
Ian Campbella2ebf922014-07-18 20:38:41 +010078#ifdef CONFIG_AHCI
Bernhard Nortmannb4946db2015-06-10 10:51:40 +020079#define CONFIG_SYS_64BIT_LBA
Ian Campbella2ebf922014-07-18 20:38:41 +010080#endif
81
Hans de Goede3ce35f92015-08-16 14:48:22 +020082#ifdef CONFIG_NAND_SUNXI
Boris Brezillon94754ad2016-06-15 21:09:27 +020083#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
Boris Brezillon57f20382016-06-15 21:09:23 +020084#define CONFIG_SYS_MAX_NAND_DEVICE 8
Piotr Zierhoffere2b662b2015-07-23 14:33:03 +020085#endif
86
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010087/* mmc config */
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010088#define CONFIG_MMC_SUNXI_SLOT 0
Maxime Ripardd780cdc2017-02-27 18:22:03 +010089
Emmanuel Vadot63b45782016-11-05 20:51:11 +010090#define CONFIG_SYS_MMC_MAX_DEVICE 4
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010091
Ian Campbell6efe3692014-05-05 11:52:26 +010092/*
93 * Miscellaneous configurable options
94 */
Ian Campbell6efe3692014-05-05 11:52:26 +010095
Ian Campbell6efe3692014-05-05 11:52:26 +010096/* standalone support */
Hans de Goeded241ecf2015-05-19 22:12:31 +020097#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbell6efe3692014-05-05 11:52:26 +010098
Ian Campbell6efe3692014-05-05 11:52:26 +010099/* FLASH and environment organization */
100
Boris Brezillon8646f2a2015-07-27 16:21:26 +0200101#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +0100102
Icenowy Zheng5e6dd272018-07-21 16:20:20 +0800103/*
104 * We cannot use expressions here, because expressions won't be evaluated in
105 * autoconf.mk.
106 */
107#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
Andre Przywaracced7482017-04-26 01:32:42 +0100108#ifdef CONFIG_ARM64
109/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
110#define LOW_LEVEL_SRAM_STACK 0x00054000
111#else
Andre Przywarade454ec2017-02-16 01:20:23 +0000112#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywaracced7482017-04-26 01:32:42 +0100113#endif /* !CONFIG_ARM64 */
Icenowy Zheng73210762018-07-21 16:20:24 +0800114#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
Jernej Skrabece638e052021-01-11 21:11:46 +0100115#ifdef CONFIG_MACH_SUN50I_H616
Jernej Skrabece638e052021-01-11 21:11:46 +0100116#define LOW_LEVEL_SRAM_STACK 0x58000
117#else
Icenowy Zheng73210762018-07-21 16:20:24 +0800118/* end of SRAM A2 on H6 for now */
119#define LOW_LEVEL_SRAM_STACK 0x00118000
Jernej Skrabece638e052021-01-11 21:11:46 +0100120#endif
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200121#else
Andre Przywarade454ec2017-02-16 01:20:23 +0000122#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200123#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100124
Hans de Goede73d7d422014-06-09 11:37:00 +0200125/* Ethernet support */
Hans de Goede73d7d422014-06-09 11:37:00 +0200126
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200127#ifdef CONFIG_USB_EHCI_HCD
Hans de Goede804fa572015-05-10 14:10:27 +0200128#define CONFIG_USB_OHCI_NEW
Hans de Goede804fa572015-05-10 14:10:27 +0200129#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Hans de Goedef494cad2015-01-11 17:17:00 +0100130#endif
131
Ian Campbell6efe3692014-05-05 11:52:26 +0100132#ifndef CONFIG_SPL_BUILD
Hans de Goede6f2da072014-07-31 23:04:45 +0200133
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100134#ifdef CONFIG_ARM64
135/*
136 * Boards seem to come with at least 512MB of DRAM.
137 * The kernel should go at 512K, which is the default text offset (that will
138 * be adjusted at runtime if needed).
139 * There is no compression for arm64 kernels (yet), so leave some space
140 * for really big kernels, say 256MB for now.
141 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100142 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100143#define BOOTM_SIZE __stringify(0xa000000)
144#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100145#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000))
146#define KERNEL_COMP_SIZE __stringify(0xb000000)
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100147#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
148#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
149#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
150#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
151#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100152
Icenowy Zhengb00ef022022-01-29 10:23:06 -0500153#elif defined(CONFIG_MACH_SUN8I_V3S)
154/*
155 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
156 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
157 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
158 */
159#define BOOTM_SIZE __stringify(0x2e00000)
160#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
161#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
162#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
163#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
164#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
165#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000))
166
167#elif defined(CONFIG_MACH_SUNIV)
168/*
169 * 32M RAM minus 1MB heap + 8MB for u-boot, stack, fb, etc.
170 * 8M uncompressed kernel, 4M compressed kernel, 512K fdt,
171 * 512K script, 512K pxe and the ramdisk at the end.
172 */
173#define BOOTM_SIZE __stringify(0x1700000)
174#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0500000))
175#define FDT_ADDR_R __stringify(SDRAM_OFFSET(0C00000))
176#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(0C50000))
177#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(0D00000))
178#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(0D50000))
179#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(0D60000))
180
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100181#else
Hans de Goede3400a7c2014-12-24 16:08:30 +0100182/*
Hans de Goede9f7dc802015-09-13 17:16:54 +0200183 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100184 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100185 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100186 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100187#define BOOTM_SIZE __stringify(0xa000000)
188#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
189#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
190#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
191#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
192#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
193#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100194#endif
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200195
Hans de Goede2f60c312014-08-01 09:37:58 +0200196#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zheng52e61882017-04-08 15:30:12 +0800197 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200198 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
199 "fdt_addr_r=" FDT_ADDR_R "\0" \
200 "scriptaddr=" SCRIPT_ADDR_R "\0" \
201 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100202 "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200203 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
204
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100205#ifdef CONFIG_ARM64
206
207#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
208 "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
209 "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
210
211#else
212
213#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
214
215#endif
216
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200217#define DFU_ALT_INFO_RAM \
218 "dfu_alt_info_ram=" \
219 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
220 "fdt ram " FDT_ADDR_R " 0x100000;" \
221 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede2f60c312014-08-01 09:37:58 +0200222
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800223#ifdef CONFIG_MMC
Karsten Merker16b91632015-12-16 20:59:40 +0100224#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripard65cefba2017-08-23 10:12:22 +0200225#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
226 BOOTENV_DEV_MMC(MMC, mmc, 0) \
227 BOOTENV_DEV_MMC(MMC, mmc, 1) \
228 "bootcmd_mmc_auto=" \
229 "if test ${mmc_bootdev} -eq 1; then " \
230 "run bootcmd_mmc1; " \
231 "run bootcmd_mmc0; " \
232 "elif test ${mmc_bootdev} -eq 0; then " \
233 "run bootcmd_mmc0; " \
234 "run bootcmd_mmc1; " \
235 "fi\0"
236
237#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
238 "mmc_auto "
239
240#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker16b91632015-12-16 20:59:40 +0100241#else
Maxime Ripard65cefba2017-08-23 10:12:22 +0200242#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker16b91632015-12-16 20:59:40 +0100243#endif
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800244#else
245#define BOOT_TARGET_DEVICES_MMC(func)
246#endif
247
Hans de Goede6f2da072014-07-31 23:04:45 +0200248#ifdef CONFIG_AHCI
249#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
250#else
251#define BOOT_TARGET_DEVICES_SCSI(func)
252#endif
253
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200254#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800255#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
256#else
257#define BOOT_TARGET_DEVICES_USB(func)
258#endif
259
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100260#ifdef CONFIG_CMD_PXE
261#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
262#else
263#define BOOT_TARGET_DEVICES_PXE(func)
264#endif
265
266#ifdef CONFIG_CMD_DHCP
267#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
268#else
269#define BOOT_TARGET_DEVICES_DHCP(func)
270#endif
271
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200272/* FEL boot support, auto-execute boot.scr if a script address was provided */
273#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
274 "bootcmd_fel=" \
275 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
276 "echo '(FEL boot)'; " \
277 "source ${fel_scriptaddr}; " \
278 "fi\0"
279#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
280 "fel "
281
Hans de Goede6f2da072014-07-31 23:04:45 +0200282#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200283 func(FEL, fel, na) \
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800284 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede6f2da072014-07-31 23:04:45 +0200285 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800286 BOOT_TARGET_DEVICES_USB(func) \
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100287 BOOT_TARGET_DEVICES_PXE(func) \
288 BOOT_TARGET_DEVICES_DHCP(func)
Hans de Goede6f2da072014-07-31 23:04:45 +0200289
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100290#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
291#define BOOTCMD_SUNXI_COMPAT \
292 "bootcmd_sunxi_compat=" \
293 "setenv root /dev/mmcblk0p3 rootwait; " \
294 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
295 "echo Loaded environment from uEnv.txt; " \
296 "env import -t 0x44000000 ${filesize}; " \
297 "fi; " \
298 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
299 "ext2load mmc 0 0x43000000 script.bin && " \
300 "ext2load mmc 0 0x48000000 uImage && " \
301 "bootm 0x48000000\0"
302#else
303#define BOOTCMD_SUNXI_COMPAT
304#endif
305
Hans de Goede6f2da072014-07-31 23:04:45 +0200306#include <config_distro_bootcmd.h>
307
Hans de Goede16030822014-09-18 21:03:34 +0200308#ifdef CONFIG_USB_KEYBOARD
309#define CONSOLE_STDIN_SETTINGS \
Hans de Goede16030822014-09-18 21:03:34 +0200310 "stdin=serial,usbkbd\0"
311#else
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200312#define CONSOLE_STDIN_SETTINGS \
313 "stdin=serial\0"
Hans de Goede16030822014-09-18 21:03:34 +0200314#endif
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200315
Jagan Teki5bc34cb2021-02-22 00:12:34 +0000316#ifdef CONFIG_DM_VIDEO
Jernej Skrabec8d91b462017-03-27 19:22:32 +0200317#define CONSOLE_STDOUT_SETTINGS \
318 "stdout=serial,vidconsole\0" \
319 "stderr=serial,vidconsole\0"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200320#else
321#define CONSOLE_STDOUT_SETTINGS \
322 "stdout=serial\0" \
323 "stderr=serial\0"
324#endif
325
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100326#ifdef CONFIG_MTDIDS_DEFAULT
327#define SUNXI_MTDIDS_DEFAULT \
328 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
329#else
330#define SUNXI_MTDIDS_DEFAULT
331#endif
332
333#ifdef CONFIG_MTDPARTS_DEFAULT
334#define SUNXI_MTDPARTS_DEFAULT \
335 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
336#else
337#define SUNXI_MTDPARTS_DEFAULT
338#endif
339
Maxime Ripard32c544d2017-11-14 21:24:00 +0100340#define PARTS_DEFAULT \
341 "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \
342 "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \
343 "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \
344 "name=system,size=-,uuid=${uuid_gpt_system};"
345
346#define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b"
347
348#ifdef CONFIG_ARM64
349#define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae"
350#else
351#define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3"
352#endif
353
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200354#define CONSOLE_ENV_SETTINGS \
355 CONSOLE_STDIN_SETTINGS \
356 CONSOLE_STDOUT_SETTINGS
357
Andreas Färber26f00d22017-04-14 18:44:47 +0200358#ifdef CONFIG_ARM64
359#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
360#else
361#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
362#endif
363
Hans de Goede6f2da072014-07-31 23:04:45 +0200364#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200365 CONSOLE_ENV_SETTINGS \
Hans de Goede2f60c312014-08-01 09:37:58 +0200366 MEM_LAYOUT_ENV_SETTINGS \
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100367 MEM_LAYOUT_ENV_EXTRA_SETTINGS \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200368 DFU_ALT_INFO_RAM \
Andreas Färber26f00d22017-04-14 18:44:47 +0200369 "fdtfile=" FDTFILE "\0" \
Hans de Goede2f60c312014-08-01 09:37:58 +0200370 "console=ttyS0,115200\0" \
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100371 SUNXI_MTDIDS_DEFAULT \
372 SUNXI_MTDPARTS_DEFAULT \
Maxime Ripard32c544d2017-11-14 21:24:00 +0100373 "uuid_gpt_esp=" UUID_GPT_ESP "\0" \
374 "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
375 "partitions=" PARTS_DEFAULT "\0" \
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100376 BOOTCMD_SUNXI_COMPAT \
Hans de Goede6f2da072014-07-31 23:04:45 +0200377 BOOTENV
378
379#else /* ifndef CONFIG_SPL_BUILD */
380#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbell6efe3692014-05-05 11:52:26 +0100381#endif
382
383#endif /* _SUNXI_COMMON_CONFIG_H */