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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -06002/*
3 * Configuation settings for the Motorola MC5275EVB board.
4 *
5 * By Arthur Shipkowski <art@videon-central.com>
6 * Copyright (C) 2005 Videon Central, Inc.
7 *
8 * Based off of M5272C3 board code by Josef Baumgartner
9 * <josef.baumgartner@telex.de>
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060010 */
11
12/*
13 * board/config.h - configuration options, board specific
14 */
15
16#ifndef _M5275EVB_H
17#define _M5275EVB_H
18
19/*
20 * High Level Configuration Options
21 * (easy to change)
22 */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060023
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020024#define CONFIG_SYS_UART_PORT (0)
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060025
26/* Configuration for environment
27 * Environment is embedded in u-boot in the second sector of the flash
28 */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060029
angelo@sysam.it6312a952015-03-29 22:54:16 +020030#define LDS_BOARD_TEXT \
Simon Glass547cb402017-08-03 12:21:49 -060031 . = DEFINED(env_offset) ? env_offset : .; \
32 env/embedded.o(.text);
angelo@sysam.it6312a952015-03-29 22:54:16 +020033
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060034/* Available command configuration */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060035
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060036#ifdef CONFIG_MCFFEC
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020037#define CONFIG_SYS_DISCOVER_PHY
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020038/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
39#ifndef CONFIG_SYS_DISCOVER_PHY
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060040#define FECDUPLEX FULL
41#define FECSPEED _100BASET
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060042#endif
43#endif
44
45/* I2C */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020046#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
47#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
48#define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060049
TsiChung Liew23cc28c2010-03-10 16:33:03 -060050#ifdef CONFIG_MCFFEC
TsiChung Liew23cc28c2010-03-10 16:33:03 -060051# define CONFIG_OVERWRITE_ETHADDR_ONCE
52#endif /* FEC_ENET */
53
54#define CONFIG_EXTRA_ENV_SETTINGS \
55 "netdev=eth0\0" \
56 "loadaddr=10000\0" \
57 "uboot=u-boot.bin\0" \
58 "load=tftp ${loadaddr} ${uboot}\0" \
59 "upd=run load; run prog\0" \
60 "prog=prot off ffe00000 ffe3ffff;" \
61 "era ffe00000 ffe3ffff;" \
62 "cp.b ${loadaddr} ffe00000 ${filesize};"\
63 "save\0" \
64 ""
65
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020066#define CONFIG_SYS_CLK 150000000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060067
68/*
69 * Low Level Configuration Settings
70 * (address mappings, register initial values, etc.)
71 * You should know what you are doing if you make changes here.
72 */
73
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020074#define CONFIG_SYS_MBAR 0x40000000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060075
76/*-----------------------------------------------------------------------
77 * Definitions for initial stack pointer and data area (in DPRAM)
78 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020079#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +020080#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060081
82/*-----------------------------------------------------------------------
83 * Start addresses for the final memory configuration
84 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020085 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060086 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020087#define CONFIG_SYS_SDRAM_BASE 0x00000000
88#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
TsiChung Liew7f1a0462008-10-21 10:03:07 +000089#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060090
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020091#define CONFIG_SYS_MONITOR_LEN 0x20000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060092
93/*
94 * For booting Linux, the board info and command line data
95 * have to be in the first 8 MB of memory, since this is
96 * the maximum mapped by the Linux kernel during initialization ??
97 */
TsiChung Liew25a00632009-01-27 12:57:47 +000098#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
99#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600100
101/*-----------------------------------------------------------------------
102 * FLASH organization
103 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200104#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
105#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600106
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200107#define CONFIG_SYS_FLASH_SIZE 0x200000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600108
109/*-----------------------------------------------------------------------
110 * Cache Configuration
111 */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600112
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600113#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200114 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600115#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200116 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600117#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
118#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
119 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
120 CF_ACR_EN | CF_ACR_SM_ALL)
121#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
122 CF_CACR_DISD | CF_CACR_INVI | \
123 CF_CACR_CEIB | CF_CACR_DCM | \
124 CF_CACR_EUSP)
125
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600126/*-----------------------------------------------------------------------
127 * Memory bank definitions
128 */
TsiChung Liew7f1a0462008-10-21 10:03:07 +0000129#define CONFIG_SYS_CS0_BASE 0xffe00000
130#define CONFIG_SYS_CS0_CTRL 0x00001980
131#define CONFIG_SYS_CS0_MASK 0x001F0001
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600132
TsiChung Liew7f1a0462008-10-21 10:03:07 +0000133#define CONFIG_SYS_CS1_BASE 0x30000000
134#define CONFIG_SYS_CS1_CTRL 0x00001900
135#define CONFIG_SYS_CS1_MASK 0x00070001
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600136
137/*-----------------------------------------------------------------------
138 * Port configuration
139 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200140#define CONFIG_SYS_FECI2C 0x0FA0
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600141
142#endif /* _M5275EVB_H */