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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05302/*
Marcel Ziswiler510c2dd2019-03-25 17:25:01 +01003 * Copyright 2015-2019 Toradex, Inc.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05304 *
Marcel Ziswilerd92dee52016-11-16 17:49:23 +01005 * Configuration settings for the Toradex VF50/VF61 modules.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05306 *
7 * Based on vf610twr.h:
8 * Copyright 2013 Freescale Semiconductor, Inc.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05309 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#include <asm/arch/imx-regs.h>
Marcel Ziswiler2e3b3d52019-03-25 17:25:02 +010015#include <linux/sizes.h>
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053016
Stefan Agner13011752017-04-11 11:12:14 +053017#ifdef CONFIG_VIDEO_FSL_DCU_FB
Stefan Agner13011752017-04-11 11:12:14 +053018#define CONFIG_VIDEO_BMP_LOGO
19#define CONFIG_SYS_FSL_DCU_LE
20
21#define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
22#define DCU_LAYER_MAX_NUM 64
23#endif
24
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053025/* NAND support */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053026#define CONFIG_SYS_MAX_NAND_DEVICE 1
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053027
28#define CONFIG_IPADDR 192.168.10.2
29#define CONFIG_NETMASK 255.255.255.0
30#define CONFIG_SERVERIP 192.168.10.1
31
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053032#define CONFIG_FDTADDR 0x84000000
33
34/* We boot from the gfxRAM area of the OCRAM. */
Stefan Agner1faaa3c2017-10-17 13:59:19 +020035#define CONFIG_BOARD_SIZE_LIMIT 520192
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053036
Stefan Agnerc0594832019-03-25 17:25:03 +010037#define MEM_LAYOUT_ENV_SETTINGS \
38 "bootm_size=0x10000000\0" \
39 "fdt_addr_r=0x82000000\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +010040 "kernel_addr_r=0x81000000\0" \
41 "pxefile_addr_r=0x87100000\0" \
42 "ramdisk_addr_r=0x82100000\0" \
43 "scriptaddr=0x87000000\0"
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053044
Igor Opaniukaf80e152019-12-09 12:33:32 +020045#define UBOOT_UPDATE \
46 "update_uboot=nand erase.part u-boot && " \
47 "nand write ${loadaddr} u-boot ${filesize}\0" \
48
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053049#define NFS_BOOTCMD \
50 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
51 "nfsboot=run setup; " \
52 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
53 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
54 "dhcp ${kernel_addr_r} && " \
55 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053056 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053057
Stefan Agnerc0594832019-03-25 17:25:03 +010058#define UBI_BOOTCMD \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053059 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
60 "ubi.fm_autoconvert=1\0" \
61 "ubiboot=run setup; " \
62 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
63 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
Sanchayan Maity27e4e102016-11-25 16:19:17 +053064 "ubi part ubi && " \
65 "ubi read ${kernel_addr_r} kernel && " \
66 "ubi read ${fdt_addr_r} dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053067 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053068
Stefan Agnerc0594832019-03-25 17:25:03 +010069#define BOOT_TARGET_DEVICES(func) \
70 func(MMC, mmc, 0) \
71 func(USB, usb, 0) \
72 func(DHCP, dhcp, na)
73#include <config_distro_bootcmd.h>
74#undef BOOTENV_RUN_NET_USB_START
75#define BOOTENV_RUN_NET_USB_START ""
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053076
Sanchayan Maity7755e532015-04-17 18:56:42 +053077#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
78
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053079#define CONFIG_EXTRA_ENV_SETTINGS \
Stefan Agnerc0594832019-03-25 17:25:03 +010080 BOOTENV \
81 MEM_LAYOUT_ENV_SETTINGS \
82 NFS_BOOTCMD \
Stefan Agnerc0594832019-03-25 17:25:03 +010083 UBI_BOOTCMD \
Igor Opaniukaf80e152019-12-09 12:33:32 +020084 UBOOT_UPDATE \
Stefan Agnerc0594832019-03-25 17:25:03 +010085 "console=ttyLP0\0" \
Stefan Agnerb093f0f2019-03-25 17:25:07 +010086 "defargs=user_debug=30\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +010087 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053088 "fdt_board=eval-v3\0" \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053089 "fdt_fixup=;\0" \
Max Krummenacher115d21f2020-06-16 22:20:05 +030090 "kernel_image=zImage\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +010091 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053092 "setsdupdate=mmc rescan && set interface mmc && " \
Stefan Agnerc0594832019-03-25 17:25:03 +010093 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
94 "source ${loadaddr}\0" \
95 "setup=setenv setupargs console=tty1 console=${console}" \
96 ",${baudrate}n8 ${memargs}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053097 "setupdate=run setsdupdate || run setusbupdate\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +010098 "setusbupdate=usb start && set interface usb && " \
99 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
100 "source ${loadaddr}\0" \
Stefan Agner13011752017-04-11 11:12:14 +0530101 "splashpos=m,m\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +0100102 "video-mode=dcufb:640x480-16@60,monitor=lcd\0"
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530103
104/* Miscellaneous configurable options */
Sanchayan Maity0d92de42015-06-08 12:40:41 +0530105#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530106#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
107
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530108/* Physical memory map */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530109#define PHYS_SDRAM (0x80000000)
Marcel Ziswiler2e3b3d52019-03-25 17:25:02 +0100110#define PHYS_SDRAM_SIZE (256 * SZ_1M)
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530111
112#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
113#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
114#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
115
116#define CONFIG_SYS_INIT_SP_OFFSET \
117 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
118#define CONFIG_SYS_INIT_SP_ADDR \
119 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
120
121/* Environment organization */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530122#ifdef CONFIG_ENV_IS_IN_NAND
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530123#define CONFIG_ENV_RANGE (4 * 64 * 2048)
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530124#endif
125
Sanchayan Maity7755e532015-04-17 18:56:42 +0530126/* USB Host Support */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530127#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
128#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
129
Sanchayan Maity7755e532015-04-17 18:56:42 +0530130/* USB DFU */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530131
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530132#endif /* __CONFIG_H */