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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05302/*
Marcel Ziswiler510c2dd2019-03-25 17:25:01 +01003 * Copyright 2015-2019 Toradex, Inc.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05304 *
Marcel Ziswilerd92dee52016-11-16 17:49:23 +01005 * Configuration settings for the Toradex VF50/VF61 modules.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05306 *
7 * Based on vf610twr.h:
8 * Copyright 2013 Freescale Semiconductor, Inc.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05309 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#include <asm/arch/imx-regs.h>
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053015
Gong Qianyu52de2e52015-10-26 19:47:42 +080016#define CONFIG_SYS_FSL_CLK
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053017
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053018#define CONFIG_SKIP_LOWLEVEL_INIT
19
Stefan Agner13011752017-04-11 11:12:14 +053020#ifdef CONFIG_VIDEO_FSL_DCU_FB
Stefan Agner13011752017-04-11 11:12:14 +053021#define CONFIG_SPLASH_SCREEN_ALIGN
22#define CONFIG_VIDEO_LOGO
23#define CONFIG_VIDEO_BMP_LOGO
24#define CONFIG_SYS_FSL_DCU_LE
25
26#define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
27#define DCU_LAYER_MAX_NUM 64
28#endif
29
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053030/* Size of malloc() pool */
31#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
32
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053033/* Allow to overwrite serial and ethaddr */
34#define CONFIG_ENV_OVERWRITE
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053035
36/* NAND support */
Stefan Agner4ce682a2015-05-08 19:07:13 +020037#define CONFIG_SYS_NAND_ONFI_DETECTION
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053038#define CONFIG_SYS_MAX_NAND_DEVICE 1
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053039
40#define CONFIG_IPADDR 192.168.10.2
41#define CONFIG_NETMASK 255.255.255.0
42#define CONFIG_SERVERIP 192.168.10.1
43
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053044#define CONFIG_LOADADDR 0x80008000
45#define CONFIG_FDTADDR 0x84000000
46
47/* We boot from the gfxRAM area of the OCRAM. */
Stefan Agner1faaa3c2017-10-17 13:59:19 +020048#define CONFIG_BOARD_SIZE_LIMIT 520192
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053049
50#define SD_BOOTCMD \
51 "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \
52 "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \
53 "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
54 "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \
55 "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053056 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053057
58#define NFS_BOOTCMD \
59 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
60 "nfsboot=run setup; " \
61 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
62 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
63 "dhcp ${kernel_addr_r} && " \
64 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053065 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053066
67#define UBI_BOOTCMD \
68 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
69 "ubi.fm_autoconvert=1\0" \
70 "ubiboot=run setup; " \
71 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
72 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
Sanchayan Maity27e4e102016-11-25 16:19:17 +053073 "ubi part ubi && " \
74 "ubi read ${kernel_addr_r} kernel && " \
75 "ubi read ${fdt_addr_r} dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053076 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053077
78#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
79
Sanchayan Maity7755e532015-04-17 18:56:42 +053080#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
81
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053082#define CONFIG_EXTRA_ENV_SETTINGS \
83 "kernel_addr_r=0x82000000\0" \
84 "fdt_addr_r=0x84000000\0" \
85 "kernel_file=zImage\0" \
86 "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \
87 "fdt_board=eval-v3\0" \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053088 "fdt_fixup=;\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053089 "defargs=\0" \
90 "console=ttyLP0\0" \
91 "setup=setenv setupargs " \
92 "console=tty1 console=${console}" \
93 ",${baudrate}n8 ${memargs}\0" \
94 "setsdupdate=mmc rescan && set interface mmc && " \
95 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
96 "source ${loadaddr}\0" \
97 "setusbupdate=usb start && set interface usb && " \
98 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
99 "source ${loadaddr}\0" \
100 "setupdate=run setsdupdate || run setusbupdate\0" \
Tom Rini5ad8e112017-10-22 17:55:07 -0400101 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Sanchayan Maity7755e532015-04-17 18:56:42 +0530102 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
Stefan Agner13011752017-04-11 11:12:14 +0530103 "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \
104 "splashpos=m,m\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530105 SD_BOOTCMD \
106 NFS_BOOTCMD \
107 UBI_BOOTCMD
108
109/* Miscellaneous configurable options */
Sanchayan Maity0d92de42015-06-08 12:40:41 +0530110#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530111#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
112
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530113#define CONFIG_SYS_MEMTEST_START 0x80010000
114#define CONFIG_SYS_MEMTEST_END 0x87C00000
115
116#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
117#define CONFIG_SYS_HZ 1000
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530118
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530119/* Physical memory map */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530120#define PHYS_SDRAM (0x80000000)
121#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
122
123#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
124#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
125#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
126
127#define CONFIG_SYS_INIT_SP_OFFSET \
128 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
129#define CONFIG_SYS_INIT_SP_ADDR \
130 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
131
132/* Environment organization */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530133#ifdef CONFIG_ENV_IS_IN_NAND
134#define CONFIG_ENV_SIZE (64 * 2048)
135#define CONFIG_ENV_RANGE (4 * 64 * 2048)
136#define CONFIG_ENV_OFFSET (12 * 64 * 2048)
137#endif
138
Sanchayan Maity7755e532015-04-17 18:56:42 +0530139/* USB Host Support */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530140#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
141#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
142
Sanchayan Maity7755e532015-04-17 18:56:42 +0530143/* USB DFU */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530144#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024)
145
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530146#endif /* __CONFIG_H */