blob: e0d92a66b39255546efb9d3b8834e590bd71b435 [file] [log] [blame]
Simon Glass2cffe662015-08-30 16:55:38 -06001/*
2 * (C) Copyright 2015 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <debug_uart.h>
9#include <dm.h>
10#include <fdtdec.h>
11#include <led.h>
12#include <malloc.h>
13#include <ram.h>
14#include <spl.h>
15#include <asm/gpio.h>
16#include <asm/io.h>
17#include <asm/arch/clock.h>
18#include <asm/arch/hardware.h>
19#include <asm/arch/periph.h>
20#include <asm/arch/sdram.h>
huang lin8db3e242015-11-17 14:20:09 +080021#include <asm/arch/timer.h>
Simon Glass2cffe662015-08-30 16:55:38 -060022#include <dm/pinctrl.h>
23#include <dm/root.h>
24#include <dm/test.h>
25#include <dm/util.h>
26#include <power/regulator.h>
27
28DECLARE_GLOBAL_DATA_PTR;
29
30u32 spl_boot_device(void)
31{
Simon Glass26158ef2016-07-04 11:58:32 -060032#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Simon Glass2cffe662015-08-30 16:55:38 -060033 const void *blob = gd->fdt_blob;
34 struct udevice *dev;
35 const char *bootdev;
36 int node;
37 int ret;
38
39 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
40 debug("Boot device %s\n", bootdev);
41 if (!bootdev)
42 goto fallback;
43
44 node = fdt_path_offset(blob, bootdev);
45 if (node < 0) {
46 debug("node=%d\n", node);
47 goto fallback;
48 }
49 ret = device_get_global_by_of_offset(node, &dev);
50 if (ret) {
51 debug("device at node %s/%d not found: %d\n", bootdev, node,
52 ret);
53 goto fallback;
54 }
55 debug("Found device %s\n", dev->name);
56 switch (device_get_uclass_id(dev)) {
57 case UCLASS_SPI_FLASH:
58 return BOOT_DEVICE_SPI;
59 case UCLASS_MMC:
60 return BOOT_DEVICE_MMC1;
61 default:
62 debug("Booting from device uclass '%s' not supported\n",
63 dev_get_uclass_name(dev));
64 }
65
66fallback:
Simon Glass26158ef2016-07-04 11:58:32 -060067#endif
Simon Glass2cffe662015-08-30 16:55:38 -060068 return BOOT_DEVICE_MMC1;
69}
70
Marek Vasut64d64bb2016-05-14 23:42:07 +020071u32 spl_boot_mode(const u32 boot_device)
Simon Glass2cffe662015-08-30 16:55:38 -060072{
73 return MMCSD_MODE_RAW;
74}
75
76/* read L2 control register (L2CTLR) */
77static inline uint32_t read_l2ctlr(void)
78{
79 uint32_t val = 0;
80
81 asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
82
83 return val;
84}
85
86/* write L2 control register (L2CTLR) */
87static inline void write_l2ctlr(uint32_t val)
88{
89 /*
90 * Note: L2CTLR can only be written when the L2 memory system
91 * is idle, ie before the MMU is enabled.
92 */
93 asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory");
94 isb();
95}
96
97static void configure_l2ctlr(void)
98{
99 uint32_t l2ctlr;
100
101 l2ctlr = read_l2ctlr();
102 l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
103
104 /*
105 * Data RAM write latency: 2 cycles
106 * Data RAM read latency: 2 cycles
107 * Data RAM setup latency: 1 cycle
108 * Tag RAM write latency: 1 cycle
109 * Tag RAM read latency: 1 cycle
110 * Tag RAM setup latency: 1 cycle
111 */
112 l2ctlr |= (1 << 3 | 1 << 0);
113 write_l2ctlr(l2ctlr);
114}
115
Simon Glass4ba12932016-01-21 19:45:13 -0700116#ifdef CONFIG_SPL_MMC_SUPPORT
Simon Glass2cffe662015-08-30 16:55:38 -0600117static int configure_emmc(struct udevice *pinctrl)
118{
jk.kernel@gmail.comb1aeb092016-07-26 18:28:29 +0800119#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY)
jk.kernel@gmail.com2b87b932016-07-26 18:28:23 +0800120
Simon Glass2cffe662015-08-30 16:55:38 -0600121 struct gpio_desc desc;
122 int ret;
123
124 pinctrl_request_noflags(pinctrl, PERIPH_ID_EMMC);
125
126 /*
127 * TODO(sjg@chromium.org): Pick this up from device tree or perhaps
128 * use the EMMC_PWREN setting.
129 */
130 ret = dm_gpio_lookup_name("D9", &desc);
131 if (ret) {
132 debug("gpio ret=%d\n", ret);
133 return ret;
134 }
135 ret = dm_gpio_request(&desc, "emmc_pwren");
136 if (ret) {
137 debug("gpio_request ret=%d\n", ret);
138 return ret;
139 }
140 ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
141 if (ret) {
142 debug("gpio dir ret=%d\n", ret);
143 return ret;
144 }
145 ret = dm_gpio_set_value(&desc, 1);
146 if (ret) {
147 debug("gpio value ret=%d\n", ret);
148 return ret;
149 }
jk.kernel@gmail.com2b87b932016-07-26 18:28:23 +0800150#endif
Simon Glass2cffe662015-08-30 16:55:38 -0600151 return 0;
152}
Simon Glass4ba12932016-01-21 19:45:13 -0700153#endif
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800154extern void back_to_bootrom(void);
Simon Glass2cffe662015-08-30 16:55:38 -0600155void board_init_f(ulong dummy)
156{
157 struct udevice *pinctrl;
158 struct udevice *dev;
159 int ret;
160
161 /* Example code showing how to enable the debug UART on RK3288 */
162#ifdef EARLY_UART
163#include <asm/arch/grf_rk3288.h>
164 /* Enable early UART on the RK3288 */
165#define GRF_BASE 0xff770000
166 struct rk3288_grf * const grf = (void *)GRF_BASE;
167
168 rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
169 GPIO7C6_MASK << GPIO7C6_SHIFT,
170 GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
171 GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
172 /*
173 * Debug UART can be used from here if required:
174 *
175 * debug_uart_init();
176 * printch('a');
177 * printhex8(0x1234);
178 * printascii("string");
179 */
180 debug_uart_init();
181#endif
182
183 ret = spl_init();
184 if (ret) {
185 debug("spl_init() failed: %d\n", ret);
186 hang();
187 }
188
huang lin8db3e242015-11-17 14:20:09 +0800189 rockchip_timer_init();
Simon Glass2cffe662015-08-30 16:55:38 -0600190 configure_l2ctlr();
191
Simon Glassae8fe412016-07-17 15:23:17 -0600192 ret = rockchip_get_clk(&dev);
Simon Glass2cffe662015-08-30 16:55:38 -0600193 if (ret) {
194 debug("CLK init failed: %d\n", ret);
195 return;
196 }
197
198 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
199 if (ret) {
200 debug("Pinctrl init failed: %d\n", ret);
201 return;
202 }
203
204 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
205 if (ret) {
206 debug("DRAM init failed: %d\n", ret);
207 return;
208 }
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800209#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
210 back_to_bootrom();
211#endif
Simon Glass2cffe662015-08-30 16:55:38 -0600212}
213
214static int setup_led(void)
215{
216#ifdef CONFIG_SPL_LED
217 struct udevice *dev;
218 char *led_name;
219 int ret;
220
221 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
222 if (!led_name)
223 return 0;
224 ret = led_get_by_label(led_name, &dev);
225 if (ret) {
226 debug("%s: get=%d\n", __func__, ret);
227 return ret;
228 }
229 ret = led_set_on(dev, 1);
230 if (ret)
231 return ret;
232#endif
233
234 return 0;
235}
236
237void spl_board_init(void)
238{
239 struct udevice *pinctrl;
240 int ret;
241
242 ret = setup_led();
243
244 if (ret) {
245 debug("LED ret=%d\n", ret);
246 hang();
247 }
248
249 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
250 if (ret) {
251 debug("%s: Cannot find pinctrl device\n", __func__);
252 goto err;
253 }
jk.kernel@gmail.com2b87b932016-07-26 18:28:23 +0800254
Simon Glass4ba12932016-01-21 19:45:13 -0700255#ifdef CONFIG_SPL_MMC_SUPPORT
jk.kernel@gmail.com2b87b932016-07-26 18:28:23 +0800256 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
257 if (ret) {
258 debug("%s: Failed to set up SD card\n", __func__);
259 goto err;
260 }
261 ret = configure_emmc(pinctrl);
262 if (ret) {
263 debug("%s: Failed to set up eMMC\n", __func__);
264 goto err;
Simon Glass2cffe662015-08-30 16:55:38 -0600265 }
Simon Glass4ba12932016-01-21 19:45:13 -0700266#endif
Simon Glass2cffe662015-08-30 16:55:38 -0600267
268 /* Enable debug UART */
269 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
270 if (ret) {
271 debug("%s: Failed to set up console UART\n", __func__);
272 goto err;
273 }
274
275 preloader_console_init();
276 return;
277err:
278 printf("spl_board_init: Error %d\n", ret);
279
280 /* No way to report error here */
281 hang();
282}
Simon Glasse7d7a012016-01-21 19:45:06 -0700283
284void lowlevel_init(void)
285{
286}