blob: 01f5561596eace1eae317bb625a6628a1e52ba7a [file] [log] [blame]
Stefan Agner7b852342018-05-30 19:01:48 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
Marcel Ziswiler05959fc2019-04-09 17:24:14 +02003 * Copyright (C) 2018-2019 Toradex AG
Stefan Agner7b852342018-05-30 19:01:48 +02004 */
5#include <common.h>
Simon Glassa7b51302019-11-14 12:57:46 -07006#include <init.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06007#include <asm/global_data.h>
Simon Glassdbd79542020-05-10 11:40:11 -06008#include <linux/delay.h>
Marcel Ziswiler05959fc2019-04-09 17:24:14 +02009
Stefan Agner7b852342018-05-30 19:01:48 +020010#include <asm/arch/clock.h>
11#include <asm/arch/crm_regs.h>
12#include <asm/arch/imx-regs.h>
13#include <asm/arch-mx6/clock.h>
14#include <asm/arch-mx6/imx-regs.h>
15#include <asm/arch-mx6/mx6ull_pins.h>
16#include <asm/arch/sys_proto.h>
17#include <asm/gpio.h>
18#include <asm/mach-imx/boot_mode.h>
19#include <asm/mach-imx/iomux-v3.h>
20#include <asm/io.h>
Stefan Agner7b852342018-05-30 19:01:48 +020021#include <dm.h>
22#include <dm/platform_data/serial_mxc.h>
Simon Glass5e6201b2019-08-01 09:46:51 -060023#include <env.h>
Stefan Agner7b852342018-05-30 19:01:48 +020024#include <fdt_support.h>
Stefan Agner7b852342018-05-30 19:01:48 +020025#include <imx_thermal.h>
26#include <jffs2/load_kernel.h>
27#include <linux/sizes.h>
Stefan Agner7b852342018-05-30 19:01:48 +020028#include <miiphy.h>
29#include <mtd_node.h>
30#include <netdev.h>
Marcel Ziswiler05959fc2019-04-09 17:24:14 +020031
Stefan Agner7b852342018-05-30 19:01:48 +020032#include "../common/tdx-common.h"
Stefan Agnerbf1f2892019-04-09 17:24:09 +020033#include "../common/tdx-cfg-block.h"
Stefan Agner7b852342018-05-30 19:01:48 +020034
35DECLARE_GLOBAL_DATA_PTR;
36
Stefan Agner7b852342018-05-30 19:01:48 +020037#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
38 PAD_CTL_DSE_48ohm)
39
Philippe Schenkerde51f532019-04-09 17:24:12 +020040#define MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR 0x2290040
41
Stefan Agner7b852342018-05-30 19:01:48 +020042#define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
43
44#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP)
45
Stefan Agner7b852342018-05-30 19:01:48 +020046int dram_init(void)
47{
48 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
49
50 return 0;
51}
52
Stefan Agner7b852342018-05-30 19:01:48 +020053#ifdef CONFIG_NAND_MXS
Stefan Agner7b852342018-05-30 19:01:48 +020054static void setup_gpmi_nand(void)
55{
Stefan Agner7b852342018-05-30 19:01:48 +020056 setup_gpmi_io_clk((3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) |
57 (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET));
58}
Marcel Ziswiler05959fc2019-04-09 17:24:14 +020059#endif /* CONFIG_NAND_MXS */
Stefan Agner7b852342018-05-30 19:01:48 +020060
Igor Opaniukc8038562020-07-15 13:31:03 +030061#ifdef CONFIG_DM_VIDEO
Stefan Agner7b852342018-05-30 19:01:48 +020062static iomux_v3_cfg_t const backlight_pads[] = {
63 /* Backlight On */
64 MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
65 /* Backlight PWM<A> (multiplexed pin) */
66 MX6_PAD_NAND_WP_B__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
67};
68
69#define GPIO_BL_ON IMX_GPIO_NR(1, 11)
70#define GPIO_PWM_A IMX_GPIO_NR(4, 11)
71
72static int setup_lcd(void)
73{
Stefan Agner7b852342018-05-30 19:01:48 +020074 imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads));
75
76 /* Set BL_ON */
77 gpio_request(GPIO_BL_ON, "BL_ON");
78 gpio_direction_output(GPIO_BL_ON, 1);
79
80 /* Set PWM<A> to full brightness (assuming inversed polarity) */
81 gpio_request(GPIO_PWM_A, "PWM<A>");
82 gpio_direction_output(GPIO_PWM_A, 0);
83
84 return 0;
85}
86#endif
87
Stefan Agner7b852342018-05-30 19:01:48 +020088#ifdef CONFIG_FEC_MXC
Stefan Agner7b852342018-05-30 19:01:48 +020089static int setup_fec(void)
90{
91 struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
92 int ret;
93
Stefan Agner7b852342018-05-30 19:01:48 +020094 /* provide the PHY clock from the i.MX 6 */
95 ret = enable_fec_anatop_clock(1, ENET_50MHZ);
96 if (ret)
97 return ret;
98
Marcel Ziswiler05959fc2019-04-09 17:24:14 +020099 /* Use 50M anatop REF_CLK and output it on ENET2_TX_CLK */
Stefan Agner7b852342018-05-30 19:01:48 +0200100 clrsetbits_le32(&iomuxc_regs->gpr[1],
101 IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK,
102 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
103
Marcel Ziswiler561d1372019-04-09 17:24:11 +0200104 /* give new Ethernet PHY power save mode circuitry time to settle */
105 mdelay(300);
106
Stefan Agner7b852342018-05-30 19:01:48 +0200107 return 0;
108}
109
110int board_phy_config(struct phy_device *phydev)
111{
112 if (phydev->drv->config)
113 phydev->drv->config(phydev);
114 return 0;
115}
Marcel Ziswiler05959fc2019-04-09 17:24:14 +0200116#endif /* CONFIG_FEC_MXC */
Stefan Agner7b852342018-05-30 19:01:48 +0200117
118int board_init(void)
119{
120 /* address of boot parameters */
121 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
122
123#ifdef CONFIG_FEC_MXC
124 setup_fec();
125#endif
126
127#ifdef CONFIG_NAND_MXS
128 setup_gpmi_nand();
129#endif
Stefan Agner7b852342018-05-30 19:01:48 +0200130 return 0;
131}
132
133#ifdef CONFIG_CMD_BMODE
134/* TODO */
135static const struct boot_mode board_boot_modes[] = {
136 /* 4 bit bus width */
137 {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)},
138 {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)},
139 {NULL, 0},
140};
141#endif
142
143int board_late_init(void)
144{
Stefan Agnerbf1f2892019-04-09 17:24:09 +0200145#ifdef CONFIG_TDX_CFG_BLOCK
146 /*
147 * If we have a valid config block and it says we are a module with
148 * Wi-Fi/Bluetooth make sure we use the -wifi device tree.
149 */
150 if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT ||
151 tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT)
Stefan Agner7b852342018-05-30 19:01:48 +0200152 env_set("variant", "-wifi");
Stefan Agnerbf1f2892019-04-09 17:24:09 +0200153#endif
Stefan Agner7b852342018-05-30 19:01:48 +0200154
Philippe Schenkerde51f532019-04-09 17:24:12 +0200155 /*
156 * Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the
157 * SOC to request for a lower voltage during sleep. This is necessary
158 * because the voltage is changing too slow for the SOC to wake up
159 * properly.
160 */
161 __raw_writel(0x8080, MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR);
162
Stefan Agner7b852342018-05-30 19:01:48 +0200163#ifdef CONFIG_CMD_BMODE
164 add_board_boot_modes(board_boot_modes);
165#endif
166
167#ifdef CONFIG_CMD_USB_SDP
168 if (is_boot_from_usb()) {
169 printf("Serial Downloader recovery mode, using sdp command\n");
170 env_set("bootdelay", "0");
171 env_set("bootcmd", "sdp 0");
172 }
173#endif /* CONFIG_CMD_USB_SDP */
174
Igor Opaniukc8038562020-07-15 13:31:03 +0300175#if defined(CONFIG_DM_VIDEO)
176 setup_lcd();
Igor Opaniukc8038562020-07-15 13:31:03 +0300177#endif
178
Stefan Agner7b852342018-05-30 19:01:48 +0200179 return 0;
180}
181
182int checkboard(void)
183{
184 printf("Model: Toradex Colibri iMX6ULL\n");
185
186 return 0;
187}
188
189#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900190int ft_board_setup(void *blob, struct bd_info *bd)
Stefan Agner7b852342018-05-30 19:01:48 +0200191{
192#if defined(CONFIG_FDT_FIXUP_PARTITIONS)
193 static struct node_info nodes[] = {
194 { "fsl,imx6ull-gpmi-nand", MTD_DEV_TYPE_NAND, },
195 { "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, },
196 };
197
198 /* Update partition nodes using info from mtdparts env var */
199 puts(" Updating MTD partitions...\n");
200 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
201#endif
202
203 return ft_common_board_setup(blob, bd);
204}
205#endif
206
Simon Glassb75b15b2020-12-03 16:55:23 -0700207static struct mxc_serial_plat mxc_serial_plat = {
Stefan Agner7b852342018-05-30 19:01:48 +0200208 .reg = (struct mxc_uart *)UART1_BASE,
209 .use_dte = 1,
210};
211
Simon Glass1d8364a2020-12-28 20:34:54 -0700212U_BOOT_DRVINFO(mxc_serial) = {
Stefan Agner7b852342018-05-30 19:01:48 +0200213 .name = "serial_mxc",
Simon Glass71fa5b42020-12-03 16:55:18 -0700214 .plat = &mxc_serial_plat,
Stefan Agner7b852342018-05-30 19:01:48 +0200215};