Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2004-2008 |
| 4 | * Texas Instruments, <www.ti.com> |
| 5 | * Richard Woodruff <r-woodruff2@ti.com> |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | */ |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 7 | #ifndef _SYS_PROTO_H_ |
| 8 | #define _SYS_PROTO_H_ |
pekon gupta | 5bbb099 | 2013-11-22 16:53:29 +0530 | [diff] [blame] | 9 | #include <linux/mtd/omap_gpmc.h> |
Nishanth Menon | 739b98f | 2014-03-28 11:00:06 -0500 | [diff] [blame] | 10 | #include <asm/omap_common.h> |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 11 | |
| 12 | typedef struct { |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 13 | u32 mtype; |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 14 | char *board_string; |
| 15 | char *nand_string; |
| 16 | } omap3_sysinfo; |
| 17 | |
Aneesh V | d16dd01 | 2011-06-16 23:30:53 +0000 | [diff] [blame] | 18 | struct emu_hal_params { |
| 19 | u32 num_params; |
| 20 | u32 param1; |
| 21 | }; |
| 22 | |
Peter Barada | edb5c2f | 2012-11-13 07:40:28 +0000 | [diff] [blame] | 23 | /* Board SDRC timing values */ |
| 24 | struct board_sdrc_timings { |
Albert ARIBAUD \(3ADEV\) | 70988eb | 2015-01-16 09:09:48 +0100 | [diff] [blame] | 25 | u32 sharing; |
Peter Barada | edb5c2f | 2012-11-13 07:40:28 +0000 | [diff] [blame] | 26 | u32 mcfg; |
| 27 | u32 ctrla; |
| 28 | u32 ctrlb; |
| 29 | u32 rfr_ctrl; |
| 30 | u32 mr; |
| 31 | }; |
| 32 | |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 33 | void prcm_init(void); |
| 34 | void per_clocks_enable(void); |
Govindraj.R | 3968a6a | 2012-02-06 03:55:35 +0000 | [diff] [blame] | 35 | void ehci_clocks_enable(void); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 36 | void memif_init(void); |
| 37 | void sdrc_init(void); |
Peter Barada | edb5c2f | 2012-11-13 07:40:28 +0000 | [diff] [blame] | 38 | void get_board_mem_timings(struct board_sdrc_timings *timings); |
Ladislav Michl | 4852b35 | 2016-07-12 20:28:15 +0200 | [diff] [blame] | 39 | int identify_nand_chip(int *mfr, int *id); |
Vaibhav Hiremath | 598f702 | 2010-06-07 15:20:53 -0400 | [diff] [blame] | 40 | void emif4_init(void); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 41 | void gpmc_init(void); |
Ladislav Michl | d5b1c27 | 2016-07-12 20:28:16 +0200 | [diff] [blame] | 42 | void enable_gpmc_cs_config(const u32 *gpmc_config, const struct gpmc_cs *cs, |
| 43 | u32 base, u32 size); |
Ladislav Michl | 446e94a | 2016-07-12 20:28:17 +0200 | [diff] [blame] | 44 | void set_gpmc_cs0(int flash_type); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 45 | void watchdog_init(void); |
| 46 | void set_muxconf_regs(void); |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 47 | u32 get_cpu_family(void); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 48 | u32 get_cpu_rev(void); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 49 | u32 is_gpmc_muxed(void); |
| 50 | u32 get_gpmc0_type(void); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 51 | u32 is_running_in_sdram(void); |
| 52 | u32 is_running_in_sram(void); |
| 53 | u32 is_running_in_flash(void); |
| 54 | u32 get_device_type(void); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 55 | u32 get_boot_type(void); |
Tom Rix | 096b9c2 | 2009-09-10 15:27:57 -0400 | [diff] [blame] | 56 | void invalidate_dcache(u32); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 57 | u32 wait_on_value(u32, u32, void *, u32); |
Jeroen Hofstee | 2b56220 | 2014-10-08 22:57:57 +0200 | [diff] [blame] | 58 | void cancel_out(u32 *num, u32 *den, u32 den_limit); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 59 | void sdelay(unsigned long); |
Ladislav Michl | d3bc985 | 2017-03-06 13:54:30 +0100 | [diff] [blame] | 60 | int omap_nand_switch_ecc(uint32_t, uint32_t); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 61 | void power_init_r(void); |
Aneesh V | d16dd01 | 2011-06-16 23:30:53 +0000 | [diff] [blame] | 62 | void do_omap3_emu_romcode_call(u32 service_id, u32 parameters); |
Nishanth Menon | 53fee1e | 2015-03-09 17:12:09 -0500 | [diff] [blame] | 63 | void omap3_set_aux_cr_secure(u32 acr); |
Lokesh Vutla | e89f154 | 2012-05-29 19:26:41 +0000 | [diff] [blame] | 64 | u32 warm_reset(void); |
Paul Kocialkowski | d5b7624 | 2015-07-15 16:02:19 +0200 | [diff] [blame] | 65 | void save_omap_boot_params(void); |
Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 66 | #endif |