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Dirk Behmea1aa39c2008-12-14 09:47:12 +01001/*
2 * (C) Copyright 2004-2008
3 * Texas Instruments, <www.ti.com>
4 * Richard Woodruff <r-woodruff2@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21#ifndef _SYS_PROTO_H_
22#define _SYS_PROTO_H_
23
24typedef struct {
Dirk Behmea1aa39c2008-12-14 09:47:12 +010025 u32 mtype;
Dirk Behmea1aa39c2008-12-14 09:47:12 +010026 char *board_string;
27 char *nand_string;
28} omap3_sysinfo;
29
Aneesh Vd16dd012011-06-16 23:30:53 +000030struct emu_hal_params {
31 u32 num_params;
32 u32 param1;
33};
34
Peter Baradaedb5c2f2012-11-13 07:40:28 +000035/* Board SDRC timing values */
36struct board_sdrc_timings {
37 u32 mcfg;
38 u32 ctrla;
39 u32 ctrlb;
40 u32 rfr_ctrl;
41 u32 mr;
42};
43
Dirk Behmea1aa39c2008-12-14 09:47:12 +010044void prcm_init(void);
45void per_clocks_enable(void);
Govindraj.R3968a6a2012-02-06 03:55:35 +000046void ehci_clocks_enable(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010047
48void memif_init(void);
49void sdrc_init(void);
50void do_sdrc_init(u32, u32);
Peter Baradaedb5c2f2012-11-13 07:40:28 +000051
52void get_board_mem_timings(struct board_sdrc_timings *timings);
Tom Rini037e2e32011-11-18 12:48:07 +000053void identify_nand_chip(int *mfr, int *id);
Vaibhav Hiremath598f7022010-06-07 15:20:53 -040054void emif4_init(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010055void gpmc_init(void);
Nishanth Menon3d0377f2009-10-13 12:49:55 -040056void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
Nishanth Menon9eaf9942009-10-13 12:47:24 -040057 u32 size);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010058
59void watchdog_init(void);
60void set_muxconf_regs(void);
61
Steve Sakomanad74ace2010-08-17 14:39:34 -070062u32 get_cpu_family(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010063u32 get_cpu_rev(void);
Steve Sakomanad74ace2010-08-17 14:39:34 -070064u32 get_sku_id(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010065u32 get_sysboot_value(void);
66u32 is_gpmc_muxed(void);
67u32 get_gpmc0_type(void);
68u32 get_gpmc0_width(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010069u32 is_running_in_sdram(void);
70u32 is_running_in_sram(void);
71u32 is_running_in_flash(void);
72u32 get_device_type(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010073void secureworld_exit(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010074void try_unlock_memory(void);
75u32 get_boot_type(void);
Tom Rix096b9c22009-09-10 15:27:57 -040076void invalidate_dcache(u32);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010077void sr32(void *, u32, u32, u32);
78u32 wait_on_value(u32, u32, void *, u32);
79void sdelay(unsigned long);
80void make_cs1_contiguous(void);
81void omap_nand_switch_ecc(int);
82void power_init_r(void);
Dirk Behme12dbcf62009-03-12 19:30:50 +010083void dieid_num_r(void);
Aneesh Vd16dd012011-06-16 23:30:53 +000084void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
85void omap3_gp_romcode_call(u32 service_id, u32 parameter);
Lokesh Vutlae89f1542012-05-29 19:26:41 +000086u32 warm_reset(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010087#endif