Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2000, 2001 |
| 4 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * FPGA support |
| 9 | */ |
| 10 | #include <common.h> |
| 11 | #include <command.h> |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 12 | #include <fpga.h> |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 13 | #include <fs.h> |
wdenk | 525d7b6 | 2005-01-22 18:13:04 +0000 | [diff] [blame] | 14 | #include <malloc.h> |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 15 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 16 | /* Local functions */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 17 | static int fpga_get_op(char *opstr); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 18 | |
| 19 | /* Local defines */ |
Michal Simek | 20d6b95 | 2017-01-06 11:20:54 +0100 | [diff] [blame] | 20 | enum { |
| 21 | FPGA_NONE = -1, |
| 22 | FPGA_INFO, |
| 23 | FPGA_LOAD, |
| 24 | FPGA_LOADB, |
| 25 | FPGA_DUMP, |
| 26 | FPGA_LOADMK, |
| 27 | FPGA_LOADP, |
| 28 | FPGA_LOADBP, |
| 29 | FPGA_LOADFS, |
| 30 | }; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 31 | |
| 32 | /* ------------------------------------------------------------------------- */ |
| 33 | /* command form: |
| 34 | * fpga <op> <device number> <data addr> <datasize> |
| 35 | * where op is 'load', 'dump', or 'info' |
| 36 | * If there is no device number field, the fpga environment variable is used. |
| 37 | * If there is no data addr field, the fpgadata environment variable is used. |
| 38 | * The info command requires no data address field. |
| 39 | */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 40 | int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 41 | { |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 42 | int op, dev = FPGA_INVALID_DEVICE; |
| 43 | size_t data_size = 0; |
| 44 | void *fpga_data = NULL; |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 45 | char *devstr = env_get("fpga"); |
| 46 | char *datastr = env_get("fpgadata"); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 47 | int rc = FPGA_FAIL; |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 48 | int wrong_parms = 0; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 49 | #if defined(CONFIG_FIT) |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 50 | const char *fit_uname = NULL; |
| 51 | ulong fit_addr; |
| 52 | #endif |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 53 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 54 | fpga_fs_info fpga_fsinfo; |
| 55 | fpga_fsinfo.fstype = FS_TYPE_ANY; |
| 56 | #endif |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 57 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 58 | if (devstr) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 59 | dev = (int) simple_strtoul(devstr, NULL, 16); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 60 | if (datastr) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 61 | fpga_data = (void *)simple_strtoul(datastr, NULL, 16); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 62 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 63 | switch (argc) { |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 64 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 65 | case 9: |
| 66 | fpga_fsinfo.blocksize = (unsigned int) |
| 67 | simple_strtoul(argv[5], NULL, 16); |
| 68 | fpga_fsinfo.interface = argv[6]; |
| 69 | fpga_fsinfo.dev_part = argv[7]; |
| 70 | fpga_fsinfo.filename = argv[8]; |
| 71 | #endif |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 72 | case 5: /* fpga <op> <dev> <data> <datasize> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 73 | data_size = simple_strtoul(argv[4], NULL, 16); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 74 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 75 | case 4: /* fpga <op> <dev> <data> */ |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 76 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 77 | if (fit_parse_subimage(argv[3], (ulong)fpga_data, |
| 78 | &fit_addr, &fit_uname)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 79 | fpga_data = (void *)fit_addr; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 80 | debug("* fpga: subimage '%s' from FIT image ", |
| 81 | fit_uname); |
| 82 | debug("at 0x%08lx\n", fit_addr); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 83 | } else |
| 84 | #endif |
| 85 | { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 86 | fpga_data = (void *)simple_strtoul(argv[3], NULL, 16); |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 87 | debug("* fpga: cmdline image address = 0x%08lx\n", |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 88 | (ulong)fpga_data); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 89 | } |
Michal Simek | 77bb86d | 2016-01-05 13:51:48 +0100 | [diff] [blame] | 90 | debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 91 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 92 | case 3: /* fpga <op> <dev | data addr> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 93 | dev = (int)simple_strtoul(argv[2], NULL, 16); |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 94 | debug("%s: device = %d\n", __func__, dev); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 95 | /* FIXME - this is a really weak test */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 96 | if ((argc == 3) && (dev > fpga_count())) { |
| 97 | /* must be buffer ptr */ |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 98 | debug("%s: Assuming buffer pointer in arg 3\n", |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 99 | __func__); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 100 | |
| 101 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 102 | if (fit_parse_subimage(argv[2], (ulong)fpga_data, |
| 103 | &fit_addr, &fit_uname)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 104 | fpga_data = (void *)fit_addr; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 105 | debug("* fpga: subimage '%s' from FIT image ", |
| 106 | fit_uname); |
| 107 | debug("at 0x%08lx\n", fit_addr); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 108 | } else |
| 109 | #endif |
| 110 | { |
Michal Simek | 77bb86d | 2016-01-05 13:51:48 +0100 | [diff] [blame] | 111 | fpga_data = (void *)(uintptr_t)dev; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 112 | debug("* fpga: cmdline image addr = 0x%08lx\n", |
| 113 | (ulong)fpga_data); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 114 | } |
| 115 | |
Michal Simek | 77bb86d | 2016-01-05 13:51:48 +0100 | [diff] [blame] | 116 | debug("%s: fpga_data = 0x%lx\n", |
| 117 | __func__, (ulong)fpga_data); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 118 | dev = FPGA_INVALID_DEVICE; /* reset device num */ |
| 119 | } |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 120 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 121 | case 2: /* fpga <op> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 122 | op = (int)fpga_get_op(argv[1]); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 123 | break; |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 124 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 125 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 126 | debug("%s: Too many or too few args (%d)\n", __func__, argc); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 127 | op = FPGA_NONE; /* force usage display */ |
| 128 | break; |
| 129 | } |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 130 | |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 131 | if (dev == FPGA_INVALID_DEVICE) { |
| 132 | puts("FPGA device not specified\n"); |
| 133 | op = FPGA_NONE; |
| 134 | } |
| 135 | |
| 136 | switch (op) { |
| 137 | case FPGA_NONE: |
| 138 | case FPGA_INFO: |
| 139 | break; |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 140 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 141 | case FPGA_LOADFS: |
| 142 | /* Blocksize can be zero */ |
| 143 | if (!fpga_fsinfo.interface || !fpga_fsinfo.dev_part || |
| 144 | !fpga_fsinfo.filename) |
| 145 | wrong_parms = 1; |
| 146 | #endif |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 147 | case FPGA_LOAD: |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 148 | case FPGA_LOADP: |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 149 | case FPGA_LOADB: |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 150 | case FPGA_LOADBP: |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 151 | case FPGA_DUMP: |
| 152 | if (!fpga_data || !data_size) |
| 153 | wrong_parms = 1; |
| 154 | break; |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 155 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 156 | case FPGA_LOADMK: |
| 157 | if (!fpga_data) |
| 158 | wrong_parms = 1; |
| 159 | break; |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 160 | #endif |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 161 | } |
| 162 | |
| 163 | if (wrong_parms) { |
| 164 | puts("Wrong parameters for FPGA request\n"); |
| 165 | op = FPGA_NONE; |
| 166 | } |
| 167 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 168 | switch (op) { |
| 169 | case FPGA_NONE: |
Simon Glass | a06dfc7 | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 170 | return CMD_RET_USAGE; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 171 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 172 | case FPGA_INFO: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 173 | rc = fpga_info(dev); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 174 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 175 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 176 | case FPGA_LOAD: |
Michal Simek | 1466365 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 177 | rc = fpga_load(dev, fpga_data, data_size, BIT_FULL); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 178 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 179 | |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 180 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 181 | case FPGA_LOADP: |
| 182 | rc = fpga_load(dev, fpga_data, data_size, BIT_PARTIAL); |
| 183 | break; |
| 184 | #endif |
| 185 | |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 186 | case FPGA_LOADB: |
Michal Simek | 1466365 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 187 | rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_FULL); |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 188 | break; |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 189 | |
| 190 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 191 | case FPGA_LOADBP: |
| 192 | rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_PARTIAL); |
| 193 | break; |
| 194 | #endif |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 195 | |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 196 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 197 | case FPGA_LOADFS: |
| 198 | rc = fpga_fsload(dev, fpga_data, data_size, &fpga_fsinfo); |
| 199 | break; |
| 200 | #endif |
| 201 | |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 202 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 203 | case FPGA_LOADMK: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 204 | switch (genimg_get_format(fpga_data)) { |
Heiko Schocher | 515eb12 | 2014-05-28 11:33:33 +0200 | [diff] [blame] | 205 | #if defined(CONFIG_IMAGE_FORMAT_LEGACY) |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 206 | case IMAGE_FORMAT_LEGACY: |
| 207 | { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 208 | image_header_t *hdr = |
| 209 | (image_header_t *)fpga_data; |
| 210 | ulong data; |
Michal Simek | ead2d42 | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 211 | uint8_t comp; |
| 212 | |
| 213 | comp = image_get_comp(hdr); |
| 214 | if (comp == IH_COMP_GZIP) { |
Michal Simek | be09b94 | 2014-07-16 10:30:50 +0200 | [diff] [blame] | 215 | #if defined(CONFIG_GZIP) |
Michal Simek | ead2d42 | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 216 | ulong image_buf = image_get_data(hdr); |
| 217 | data = image_get_load(hdr); |
| 218 | ulong image_size = ~0UL; |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 219 | |
Michal Simek | ead2d42 | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 220 | if (gunzip((void *)data, ~0UL, |
| 221 | (void *)image_buf, |
| 222 | &image_size) != 0) { |
| 223 | puts("GUNZIP: error\n"); |
| 224 | return 1; |
| 225 | } |
| 226 | data_size = image_size; |
Michal Simek | be09b94 | 2014-07-16 10:30:50 +0200 | [diff] [blame] | 227 | #else |
| 228 | puts("Gunzip image is not supported\n"); |
| 229 | return 1; |
| 230 | #endif |
Michal Simek | ead2d42 | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 231 | } else { |
| 232 | data = (ulong)image_get_data(hdr); |
| 233 | data_size = image_get_data_size(hdr); |
| 234 | } |
Michal Simek | 1466365 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 235 | rc = fpga_load(dev, (void *)data, data_size, |
| 236 | BIT_FULL); |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 237 | } |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 238 | break; |
Heiko Schocher | 515eb12 | 2014-05-28 11:33:33 +0200 | [diff] [blame] | 239 | #endif |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 240 | #if defined(CONFIG_FIT) |
| 241 | case IMAGE_FORMAT_FIT: |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 242 | { |
| 243 | const void *fit_hdr = (const void *)fpga_data; |
| 244 | int noffset; |
Wolfgang Denk | 74f9b38 | 2011-07-30 13:33:49 +0000 | [diff] [blame] | 245 | const void *fit_data; |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 246 | |
| 247 | if (fit_uname == NULL) { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 248 | puts("No FIT subimage unit name\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 249 | return 1; |
| 250 | } |
| 251 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 252 | if (!fit_check_format(fit_hdr)) { |
| 253 | puts("Bad FIT image format\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 254 | return 1; |
| 255 | } |
| 256 | |
| 257 | /* get fpga component image node offset */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 258 | noffset = fit_image_get_node(fit_hdr, |
| 259 | fit_uname); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 260 | if (noffset < 0) { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 261 | printf("Can't find '%s' FIT subimage\n", |
| 262 | fit_uname); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 263 | return 1; |
| 264 | } |
| 265 | |
| 266 | /* verify integrity */ |
Simon Glass | 7428ad1 | 2013-05-07 06:11:57 +0000 | [diff] [blame] | 267 | if (!fit_image_verify(fit_hdr, noffset)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 268 | puts ("Bad Data Hash\n"); |
| 269 | return 1; |
| 270 | } |
| 271 | |
| 272 | /* get fpga subimage data address and length */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 273 | if (fit_image_get_data(fit_hdr, noffset, |
| 274 | &fit_data, &data_size)) { |
| 275 | puts("Fpga subimage data not found\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 276 | return 1; |
| 277 | } |
| 278 | |
Michal Simek | 1466365 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 279 | rc = fpga_load(dev, fit_data, data_size, |
| 280 | BIT_FULL); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 281 | } |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 282 | break; |
| 283 | #endif |
| 284 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 285 | puts("** Unknown image type\n"); |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 286 | rc = FPGA_FAIL; |
| 287 | break; |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 288 | } |
| 289 | break; |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 290 | #endif |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 291 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 292 | case FPGA_DUMP: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 293 | rc = fpga_dump(dev, fpga_data, data_size); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 294 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 295 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 296 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 297 | printf("Unknown operation\n"); |
Simon Glass | a06dfc7 | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 298 | return CMD_RET_USAGE; |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 299 | } |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 300 | return rc; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 301 | } |
| 302 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 303 | /* |
| 304 | * Map op to supported operations. We don't use a table since we |
| 305 | * would just have to relocate it from flash anyway. |
| 306 | */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 307 | static int fpga_get_op(char *opstr) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 308 | { |
| 309 | int op = FPGA_NONE; |
| 310 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 311 | if (!strcmp("info", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 312 | op = FPGA_INFO; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 313 | else if (!strcmp("loadb", opstr)) |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 314 | op = FPGA_LOADB; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 315 | else if (!strcmp("load", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 316 | op = FPGA_LOAD; |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 317 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 318 | else if (!strcmp("loadp", opstr)) |
| 319 | op = FPGA_LOADP; |
| 320 | #endif |
| 321 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 322 | else if (!strcmp("loadbp", opstr)) |
| 323 | op = FPGA_LOADBP; |
| 324 | #endif |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 325 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 326 | else if (!strcmp("loadfs", opstr)) |
| 327 | op = FPGA_LOADFS; |
| 328 | #endif |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 329 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 330 | else if (!strcmp("loadmk", opstr)) |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 331 | op = FPGA_LOADMK; |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 332 | #endif |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 333 | else if (!strcmp("dump", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 334 | op = FPGA_DUMP; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 335 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 336 | if (op == FPGA_NONE) |
| 337 | printf("Unknown fpga operation \"%s\"\n", opstr); |
| 338 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 339 | return op; |
| 340 | } |
| 341 | |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 342 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 343 | U_BOOT_CMD(fpga, 9, 1, do_fpga, |
| 344 | #else |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 345 | U_BOOT_CMD(fpga, 6, 1, do_fpga, |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 346 | #endif |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 347 | "loadable FPGA image support", |
| 348 | "[operation type] [device number] [image address] [image size]\n" |
| 349 | "fpga operations:\n" |
Michal Simek | 70da592 | 2015-01-26 08:52:27 +0100 | [diff] [blame] | 350 | " dump\t[dev] [address] [size]\tLoad device to memory buffer\n" |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 351 | " info\t[dev]\t\t\tlist known device information\n" |
| 352 | " load\t[dev] [address] [size]\tLoad device from memory buffer\n" |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 353 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 354 | " loadp\t[dev] [address] [size]\t" |
| 355 | "Load device from memory buffer with partial bitstream\n" |
| 356 | #endif |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 357 | " loadb\t[dev] [address] [size]\t" |
| 358 | "Load device from bitstream buffer (Xilinx only)\n" |
Michal Simek | 64c7098 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 359 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 360 | " loadbp\t[dev] [address] [size]\t" |
| 361 | "Load device from bitstream buffer with partial bitstream" |
| 362 | "(Xilinx only)\n" |
| 363 | #endif |
Siva Durga Prasad Paladugu | 9112b4c | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 364 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 365 | "Load device from filesystem (FAT by default) (Xilinx only)\n" |
| 366 | " loadfs [dev] [address] [image size] [blocksize] <interface>\n" |
| 367 | " [<dev[:part]>] <filename>\n" |
| 368 | #endif |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 369 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 370 | " loadmk [dev] [address]\tLoad device generated with mkimage" |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 371 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 372 | "\n" |
| 373 | "\tFor loadmk operating on FIT format uImage address must include\n" |
| 374 | "\tsubimage unit name in the form of addr:<subimg_uname>" |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 375 | #endif |
Siva Durga Prasad Paladugu | adc11de | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 376 | #endif |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 377 | ); |