blob: 90259ba7d48d558beddc6b73711f7ac416817917 [file] [log] [blame]
Mike Frysinger66c4cf42008-02-04 19:26:55 -05001/*
2 * U-boot - blackfin_local.h
3 *
4 * Copyright (c) 2005-2007 Analog Devices Inc.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 */
24
25#ifndef __BLACKFIN_LOCAL_H__
26#define __BLACKFIN_LOCAL_H__
27
28#define LO(con32) ((con32) & 0xFFFF)
29#define lo(con32) ((con32) & 0xFFFF)
30#define HI(con32) (((con32) >> 16) & 0xFFFF)
31#define hi(con32) (((con32) >> 16) & 0xFFFF)
32
33#define OFFSET_(x) (x & 0x0000FFFF)
34#define MK_BMSK_(x) (1 << x)
35
36/* Ideally this should be USEC not MSEC, but the USEC multiplication
37 * likes to overflow 32bit quantities which is all our assembler
38 * currently supports ;(
39 */
40#define USEC_PER_MSEC 1000
41#define MSEC_PER_SEC 1000
42#define BFIN_SCLK (100000000)
43#define SCLK_TO_MSEC(sclk) ((MSEC_PER_SEC * ((sclk) / USEC_PER_MSEC)) / (BFIN_SCLK / USEC_PER_MSEC))
44#define MSEC_TO_SCLK(msec) ((((BFIN_SCLK / USEC_PER_MSEC) * (msec)) / MSEC_PER_SEC) * USEC_PER_MSEC)
45
46#include <asm/linkage.h>
47
48#ifndef __ASSEMBLY__
49# ifdef SHARED_RESOURCES
50# include <asm/shared_resources.h>
51# endif
52
53# include <linux/types.h>
54
Mike Frysinger9d93a622008-10-24 22:48:47 -040055extern u_long get_vco(void);
56extern u_long get_cclk(void);
Mike Frysinger66c4cf42008-02-04 19:26:55 -050057extern u_long get_sclk(void);
58
59# define bfin_revid() (*pCHIPID >> 28)
60
61extern void blackfin_icache_flush_range(const void *, const void *);
62extern void blackfin_dcache_flush_range(const void *, const void *);
Mike Frysinger343e9f72008-10-06 03:35:44 -040063extern void blackfin_dcache_flush_invalidate_range(const void *, const void *);
Mike Frysinger66c4cf42008-02-04 19:26:55 -050064
65/* Use DMA to move data from on chip to external memory. While this is
66 * required for only L1 instruction (it is not directly readable by the
67 * core via data loads), it isn't a huge performance issue for other
68 * regions (it's probably even faster than core load/stores). However,
69 * the DMA engine does not have access to the L1 scratchpad, and we
70 * cannot use DMA inside of the MMR space.
71 */
72# define addr_bfin_on_chip_mem(addr) \
73 (((unsigned long)(addr) >= 0xef000000 && (unsigned long)addr < SYSMMR_BASE) && \
74 !((unsigned long)(addr) >= L1_SRAM_SCRATCH && \
75 (unsigned long)(addr) < L1_SRAM_SCRATCH_END))
76
77# include <asm/system.h>
78
79#if ANOMALY_05000198
80# define NOP_PAD_ANOMALY_05000198 "nop;"
81#else
82# define NOP_PAD_ANOMALY_05000198
83#endif
84
85#define bfin_read8(addr) ({ \
86 uint8_t __v; \
87 __asm__ __volatile__( \
88 NOP_PAD_ANOMALY_05000198 \
89 "%0 = b[%1] (z);" \
90 : "=d" (__v) \
91 : "a" (addr) \
92 ); \
93 __v; })
94
95#define bfin_read16(addr) ({ \
96 uint16_t __v; \
97 __asm__ __volatile__( \
98 NOP_PAD_ANOMALY_05000198 \
99 "%0 = w[%1] (z);" \
100 : "=d" (__v) \
101 : "a" (addr) \
102 ); \
103 __v; })
104
105#define bfin_read32(addr) ({ \
106 uint32_t __v; \
107 __asm__ __volatile__( \
108 NOP_PAD_ANOMALY_05000198 \
109 "%0 = [%1];" \
110 : "=d" (__v) \
111 : "a" (addr) \
112 ); \
113 __v; })
114
115#define bfin_readPTR(addr) bfin_read32(addr)
116
117#define bfin_write8(addr, val) \
118 __asm__ __volatile__( \
119 NOP_PAD_ANOMALY_05000198 \
120 "b[%0] = %1;" \
121 : \
122 : "a" (addr), "d" (val) \
123 : "memory" \
124 )
125
126#define bfin_write16(addr, val) \
127 __asm__ __volatile__( \
128 NOP_PAD_ANOMALY_05000198 \
129 "w[%0] = %1;" \
130 : \
131 : "a" (addr), "d" (val) \
132 : "memory" \
133 )
134
135#define bfin_write32(addr, val) \
136 __asm__ __volatile__( \
137 NOP_PAD_ANOMALY_05000198 \
138 "[%0] = %1;" \
139 : \
140 : "a" (addr), "d" (val) \
141 : "memory" \
142 )
143
144#define bfin_writePTR(addr, val) bfin_write32(addr, val)
145
146/* SSYNC implementation for C file */
147static inline void SSYNC(void)
148{
149 int _tmp;
150 if (ANOMALY_05000312)
151 __asm__ __volatile__(
152 "cli %0;"
153 "nop;"
154 "nop;"
155 "ssync;"
156 "sti %0;"
157 : "=d" (_tmp)
158 );
159 else if (ANOMALY_05000244)
160 __asm__ __volatile__(
161 "nop;"
162 "nop;"
163 "nop;"
164 "ssync;"
165 );
166 else
167 __asm__ __volatile__("ssync;");
168}
169
170/* CSYNC implementation for C file */
171static inline void CSYNC(void)
172{
173 int _tmp;
174 if (ANOMALY_05000312)
175 __asm__ __volatile__(
176 "cli %0;"
177 "nop;"
178 "nop;"
179 "csync;"
180 "sti %0;"
181 : "=d" (_tmp)
182 );
183 else if (ANOMALY_05000244)
184 __asm__ __volatile__(
185 "nop;"
186 "nop;"
187 "nop;"
188 "csync;"
189 );
190 else
191 __asm__ __volatile__("csync;");
192}
193
194#else /* __ASSEMBLY__ */
195
196/* SSYNC & CSYNC implementations for assembly files */
197
198#define ssync(x) SSYNC(x)
199#define csync(x) CSYNC(x)
200
201#if ANOMALY_05000312
202#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
203#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
204
205#elif ANOMALY_05000244
206#define SSYNC(scratch) nop; nop; nop; SSYNC;
207#define CSYNC(scratch) nop; nop; nop; CSYNC;
208
209#else
210#define SSYNC(scratch) SSYNC;
211#define CSYNC(scratch) CSYNC;
212
213#endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */
214
215#endif /* __ASSEMBLY__ */
216
217#endif