blob: b82fe54c6009d7d8c4fad070397b1ebcffe84628 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Christophe Kerello275f7062017-09-13 18:00:08 +02002/*
Patrice Chotard789ee0e2017-10-23 09:53:58 +02003 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
Christophe Kerello275f7062017-09-13 18:00:08 +02005 */
6
7#include <common.h>
8#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
Christophe Kerello275f7062017-09-13 18:00:08 +020010#include <misc.h>
Patrice Chotard03f10a12017-11-15 13:14:51 +010011#include <stm32_rcc.h>
12#include <dm/device-internal.h>
Simon Glass9bc15642020-02-03 07:36:16 -070013#include <dm/device_compat.h>
Christophe Kerello275f7062017-09-13 18:00:08 +020014#include <dm/lists.h>
15
Patrice Chotard7264aae2018-04-11 17:07:45 +020016struct stm32_rcc_clk stm32_rcc_clk_f42x = {
Patrice Chotard03f10a12017-11-15 13:14:51 +010017 .drv_name = "stm32fx_rcc_clock",
Patrice Chotard7264aae2018-04-11 17:07:45 +020018 .soc = STM32F42X,
Patrice Chotard03f10a12017-11-15 13:14:51 +010019};
20
Patrice Chotard7264aae2018-04-11 17:07:45 +020021struct stm32_rcc_clk stm32_rcc_clk_f469 = {
22 .drv_name = "stm32fx_rcc_clock",
23 .soc = STM32F469,
24};
25
Patrice Chotard03f10a12017-11-15 13:14:51 +010026struct stm32_rcc_clk stm32_rcc_clk_f7 = {
27 .drv_name = "stm32fx_rcc_clock",
28 .soc = STM32F7,
29};
30
31struct stm32_rcc_clk stm32_rcc_clk_h7 = {
32 .drv_name = "stm32h7_rcc_clock",
33};
34
Patrick Delaunayb139a5b2018-07-09 15:17:20 +020035struct stm32_rcc_clk stm32_rcc_clk_mp1 = {
36 .drv_name = "stm32mp1_clk",
37 .soc = STM32MP1,
38};
39
Christophe Kerello275f7062017-09-13 18:00:08 +020040static int stm32_rcc_bind(struct udevice *dev)
41{
Christophe Kerello275f7062017-09-13 18:00:08 +020042 struct udevice *child;
Patrice Chotard03f10a12017-11-15 13:14:51 +010043 struct driver *drv;
44 struct stm32_rcc_clk *rcc_clk =
45 (struct stm32_rcc_clk *)dev_get_driver_data(dev);
46 int ret;
Christophe Kerello275f7062017-09-13 18:00:08 +020047
48 debug("%s(dev=%p)\n", __func__, dev);
Patrice Chotard03f10a12017-11-15 13:14:51 +010049 drv = lists_driver_lookup_name(rcc_clk->drv_name);
50 if (!drv) {
51 debug("Cannot find driver '%s'\n", rcc_clk->drv_name);
52 return -ENOENT;
53 }
54
55 ret = device_bind_with_driver_data(dev, drv, rcc_clk->drv_name,
56 rcc_clk->soc,
57 dev_ofnode(dev), &child);
58
Christophe Kerello275f7062017-09-13 18:00:08 +020059 if (ret)
60 return ret;
61
Patrick Delaunayb139a5b2018-07-09 15:17:20 +020062 drv = lists_driver_lookup_name("stm32_rcc_reset");
63 if (!drv) {
64 dev_err(dev, "Cannot find driver stm32_rcc_reset'\n");
65 return -ENOENT;
66 }
67
68 return device_bind_with_driver_data(dev, drv, "stm32_rcc_reset",
69 rcc_clk->soc,
70 dev_ofnode(dev), &child);
Christophe Kerello275f7062017-09-13 18:00:08 +020071}
72
Christophe Kerello275f7062017-09-13 18:00:08 +020073
74static const struct udevice_id stm32_rcc_ids[] = {
Patrice Chotard7264aae2018-04-11 17:07:45 +020075 {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f42x },
76 {.compatible = "st,stm32f469-rcc", .data = (ulong)&stm32_rcc_clk_f469 },
Patrice Chotard03f10a12017-11-15 13:14:51 +010077 {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 },
78 {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 },
Patrick Delaunayb139a5b2018-07-09 15:17:20 +020079 {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_clk_mp1 },
Christophe Kerello275f7062017-09-13 18:00:08 +020080 { }
81};
82
83U_BOOT_DRIVER(stm32_rcc) = {
84 .name = "stm32-rcc",
Patrick Delaunayd79f8ee2019-08-02 13:08:08 +020085 .id = UCLASS_NOP,
Christophe Kerello275f7062017-09-13 18:00:08 +020086 .of_match = stm32_rcc_ids,
87 .bind = stm32_rcc_bind,
Christophe Kerello275f7062017-09-13 18:00:08 +020088};