Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015 Stefan Roese <sr@denx.de> |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _CONFIG_CLEARFOG_H |
| 7 | #define _CONFIG_CLEARFOG_H |
| 8 | |
Simon Glass | fb64e36 | 2020-05-10 11:40:09 -0600 | [diff] [blame] | 9 | #include <linux/stringify.h> |
| 10 | |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 11 | /* |
| 12 | * High Level Configuration Options (easy to change) |
| 13 | */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 14 | |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 15 | /* |
| 16 | * TEXT_BASE needs to be below 16MiB, since this area is scrubbed |
| 17 | * for DDR ECC byte filling in the SPL before loading the main |
| 18 | * U-Boot into it. |
| 19 | */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 20 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ |
| 21 | |
| 22 | /* |
| 23 | * Commands configuration |
| 24 | */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 25 | |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 26 | /* |
| 27 | * SDIO/MMC Card Configuration |
| 28 | */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 29 | #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE |
| 30 | |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 31 | /* USB/EHCI configuration */ |
| 32 | #define CONFIG_EHCI_IS_TDI |
| 33 | |
| 34 | #define CONFIG_ENV_MIN_ENTRIES 128 |
| 35 | |
| 36 | /* Environment in MMC */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 37 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 38 | /* |
| 39 | * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC |
| 40 | * boot image starts @ LBA-0. |
| 41 | * As result in MMC/eMMC case it will be a 1 sector gap between u-boot |
| 42 | * image and environment |
| 43 | */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 44 | |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 45 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ |
| 46 | |
| 47 | /* PCIe support */ |
| 48 | #ifndef CONFIG_SPL_BUILD |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 49 | #define CONFIG_PCI_SCAN_SHOW |
| 50 | #endif |
| 51 | |
Jon Nettleton | 7a3315e | 2018-05-28 13:35:15 +0300 | [diff] [blame] | 52 | /* SATA support */ |
| 53 | #ifdef CONFIG_SCSI |
| 54 | #define CONFIG_SCSI_AHCI_PLAT |
| 55 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 |
| 56 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
| 57 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
| 58 | CONFIG_SYS_SCSI_MAX_LUN) |
| 59 | #endif |
| 60 | |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 61 | /* Keep device tree and initrd in lower memory so the kernel can access them */ |
Patrick Wildt | 7e5b019 | 2017-05-10 15:12:34 +0200 | [diff] [blame] | 62 | #define RELOCATION_LIMITS_ENV_SETTINGS \ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 63 | "fdt_high=0x10000000\0" \ |
| 64 | "initrd_high=0x10000000\0" |
| 65 | |
| 66 | /* SPL */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 67 | |
| 68 | /* Defines for SPL */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 69 | #define CONFIG_SPL_SIZE (140 << 10) |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 70 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) |
| 71 | |
| 72 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) |
| 73 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) |
| 74 | |
| 75 | #ifdef CONFIG_SPL_BUILD |
| 76 | #define CONFIG_SYS_MALLOC_SIMPLE |
| 77 | #endif |
| 78 | |
| 79 | #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) |
| 80 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) |
| 81 | |
Baruch Siach | a417bd1 | 2018-06-18 21:56:27 +0300 | [diff] [blame] | 82 | #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI) |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 83 | /* SPL related SPI defines */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 84 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS |
Baruch Siach | 7f47968 | 2019-05-16 13:04:02 +0300 | [diff] [blame] | 85 | #elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 86 | /* SPL related MMC defines */ |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 87 | #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) |
| 88 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 89 | #ifdef CONFIG_SPL_BUILD |
| 90 | #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ |
| 91 | #endif |
| 92 | #endif |
| 93 | |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 94 | /* |
| 95 | * mv-common.h should be defined after CMD configs since it used them |
| 96 | * to enable certain macros |
| 97 | */ |
| 98 | #include "mv-common.h" |
| 99 | |
Patrick Wildt | 7e5b019 | 2017-05-10 15:12:34 +0200 | [diff] [blame] | 100 | /* Include the common distro boot environment */ |
| 101 | #ifndef CONFIG_SPL_BUILD |
Patrick Wildt | 7e5b019 | 2017-05-10 15:12:34 +0200 | [diff] [blame] | 102 | |
| 103 | #ifdef CONFIG_MMC |
| 104 | #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) |
| 105 | #else |
| 106 | #define BOOT_TARGET_DEVICES_MMC(func) |
| 107 | #endif |
| 108 | |
| 109 | #ifdef CONFIG_USB_STORAGE |
| 110 | #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) |
| 111 | #else |
| 112 | #define BOOT_TARGET_DEVICES_USB(func) |
| 113 | #endif |
| 114 | |
Joel Johnson | 7ccaed2 | 2020-03-23 11:26:32 -0600 | [diff] [blame] | 115 | #ifndef CONFIG_SCSI |
| 116 | #define BOOT_TARGET_DEVICES_SCSI_BUS0(func) |
| 117 | #define BOOT_TARGET_DEVICES_SCSI_BUS1(func) |
| 118 | #define BOOT_TARGET_DEVICES_SCSI_BUS2(func) |
Joel Johnson | 3a06e39 | 2020-03-23 11:26:31 -0600 | [diff] [blame] | 119 | #else |
Joel Johnson | 7ccaed2 | 2020-03-23 11:26:32 -0600 | [diff] [blame] | 120 | /* |
| 121 | * With SCSI enabled, M.2 SATA is always located on bus 0 |
| 122 | */ |
| 123 | #define BOOT_TARGET_DEVICES_SCSI_BUS0(func) func(SCSI, scsi, 0) |
| 124 | |
| 125 | /* |
| 126 | * Either one or both mPCIe slots may be configured as mSATA interfaces. The |
| 127 | * SCSI bus ids are assigned based on sequence of hardware present, not always |
| 128 | * tied to hardware slot ids. As such, use second SCSI bus if either slot is |
| 129 | * set for SATA, and only use third SCSI bus if both slots are SATA enabled. |
| 130 | */ |
| 131 | #if defined (CONFIG_CLEARFOG_CON2_SATA) || defined (CONFIG_CLEARFOG_CON3_SATA) |
| 132 | #define BOOT_TARGET_DEVICES_SCSI_BUS1(func) func(SCSI, scsi, 1) |
| 133 | #else |
| 134 | #define BOOT_TARGET_DEVICES_SCSI_BUS1(func) |
Joel Johnson | 3a06e39 | 2020-03-23 11:26:31 -0600 | [diff] [blame] | 135 | #endif |
| 136 | |
Joel Johnson | 7ccaed2 | 2020-03-23 11:26:32 -0600 | [diff] [blame] | 137 | #if defined (CONFIG_CLEARFOG_CON2_SATA) && defined (CONFIG_CLEARFOG_CON3_SATA) |
| 138 | #define BOOT_TARGET_DEVICES_SCSI_BUS2(func) func(SCSI, scsi, 2) |
| 139 | #else |
| 140 | #define BOOT_TARGET_DEVICES_SCSI_BUS2(func) |
| 141 | #endif |
| 142 | |
| 143 | #endif /* CONFIG_SCSI */ |
| 144 | |
| 145 | /* |
| 146 | * The SCSI buses are attempted in increasing bus order, there is no current |
| 147 | * mechanism to alter the default bus priority order for booting. |
| 148 | */ |
Patrick Wildt | 7e5b019 | 2017-05-10 15:12:34 +0200 | [diff] [blame] | 149 | #define BOOT_TARGET_DEVICES(func) \ |
| 150 | BOOT_TARGET_DEVICES_MMC(func) \ |
| 151 | BOOT_TARGET_DEVICES_USB(func) \ |
Joel Johnson | 7ccaed2 | 2020-03-23 11:26:32 -0600 | [diff] [blame] | 152 | BOOT_TARGET_DEVICES_SCSI_BUS0(func) \ |
| 153 | BOOT_TARGET_DEVICES_SCSI_BUS1(func) \ |
| 154 | BOOT_TARGET_DEVICES_SCSI_BUS2(func) \ |
Patrick Wildt | 7e5b019 | 2017-05-10 15:12:34 +0200 | [diff] [blame] | 155 | func(PXE, pxe, na) \ |
| 156 | func(DHCP, dhcp, na) |
| 157 | |
| 158 | #define KERNEL_ADDR_R __stringify(0x800000) |
| 159 | #define FDT_ADDR_R __stringify(0x100000) |
| 160 | #define RAMDISK_ADDR_R __stringify(0x1800000) |
| 161 | #define SCRIPT_ADDR_R __stringify(0x200000) |
| 162 | #define PXEFILE_ADDR_R __stringify(0x300000) |
| 163 | |
| 164 | #define LOAD_ADDRESS_ENV_SETTINGS \ |
| 165 | "kernel_addr_r=" KERNEL_ADDR_R "\0" \ |
| 166 | "fdt_addr_r=" FDT_ADDR_R "\0" \ |
| 167 | "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ |
| 168 | "scriptaddr=" SCRIPT_ADDR_R "\0" \ |
| 169 | "pxefile_addr_r=" PXEFILE_ADDR_R "\0" |
| 170 | |
| 171 | #include <config_distro_bootcmd.h> |
| 172 | |
| 173 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 174 | RELOCATION_LIMITS_ENV_SETTINGS \ |
| 175 | LOAD_ADDRESS_ENV_SETTINGS \ |
Patrick Wildt | 7e5b019 | 2017-05-10 15:12:34 +0200 | [diff] [blame] | 176 | "console=ttyS0,115200\0" \ |
| 177 | BOOTENV |
| 178 | |
| 179 | #endif /* CONFIG_SPL_BUILD */ |
| 180 | |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 181 | #endif /* _CONFIG_CLEARFOG_H */ |