Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 2 | /* |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 3 | * Copyright (C) 2010 Andreas Bießmann <biessmann.devel@googlemail.com> |
| 4 | * |
| 5 | * based on previous work by |
| 6 | * |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 7 | * Ulf Samuelsson <ulf@atmel.com> |
| 8 | * Rick Bronson <rick@efn.org> |
| 9 | * |
| 10 | * Configuration settings for the AT91RM9200EK board. |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 11 | */ |
| 12 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 13 | #ifndef __AT91RM9200EK_CONFIG_H__ |
| 14 | #define __AT91RM9200EK_CONFIG_H__ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 15 | |
Alexey Brodkin | 267d8e2 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 16 | #include <linux/sizes.h> |
Jens Scharsig | 128ecd0 | 2010-02-03 22:45:42 +0100 | [diff] [blame] | 17 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 18 | /* |
Andreas Bießmann | 334548e | 2010-11-30 09:45:03 +0000 | [diff] [blame] | 19 | * set some initial configurations depending on configure target |
| 20 | * |
| 21 | * at91rm9200ek_config -> boot from 0x0 in NOR Flash at CS0 |
| 22 | * at91rm9200ek_ram_config -> continue booting from 0x20100000 in RAM; lowlevel |
| 23 | * initialisation was done by some preloader |
| 24 | */ |
| 25 | #ifdef CONFIG_RAMBOOT |
| 26 | #define CONFIG_SKIP_LOWLEVEL_INIT |
Andreas Bießmann | 334548e | 2010-11-30 09:45:03 +0000 | [diff] [blame] | 27 | #endif |
| 28 | |
| 29 | /* |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 30 | * AT91C_XTAL_CLOCK is the frequency of external xtal in hertz |
| 31 | * AT91C_MAIN_CLOCK is the frequency of PLLA output |
| 32 | * AT91C_MASTER_CLOCK is the peripherial clock |
| 33 | * CONFIG_SYS_HZ_CLOCK is the value for CCR in tc0 (divider 2 is implicitely |
| 34 | * set in arch/arm/cpu/arm920t/at91/timer.c) |
| 35 | * CONFIG_SYS_HZ is the tick rate for timer tc0 |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 36 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 37 | #define AT91C_XTAL_CLOCK 18432000 |
Andreas Bießmann | c2a1f0f | 2011-06-12 01:49:12 +0000 | [diff] [blame] | 38 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 39 | #define AT91C_MAIN_CLOCK ((AT91C_XTAL_CLOCK / 4) * 39) |
| 40 | #define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3 ) |
| 41 | #define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 42 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 43 | /* CPU configuration */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 44 | #define CONFIG_AT91RM9200 |
| 45 | #define CONFIG_AT91RM9200EK |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 46 | #define USE_920T_MMU |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 47 | |
Andreas Bießmann | c2a1f0f | 2011-06-12 01:49:12 +0000 | [diff] [blame] | 48 | #include <asm/hardware.h> /* needed for port definitions */ |
| 49 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 50 | #define CONFIG_CMDLINE_TAG |
| 51 | #define CONFIG_SETUP_MEMORY_TAGS |
| 52 | #define CONFIG_INITRD_TAG |
| 53 | |
| 54 | /* |
| 55 | * Memory Configuration |
| 56 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 57 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 58 | #define CONFIG_SYS_SDRAM_SIZE SZ_32M |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 59 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 60 | /* |
| 61 | * LowLevel Init |
| 62 | */ |
| 63 | #ifndef CONFIG_SKIP_LOWLEVEL_INIT |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 64 | #define CONFIG_SYS_USE_MAIN_OSCILLATOR |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 65 | /* flash */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 66 | #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 |
| 67 | #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ |
| 68 | |
| 69 | /* clocks */ |
| 70 | #define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ |
| 71 | #define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ |
| 72 | /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ |
| 73 | #define CONFIG_SYS_MCKR_VAL 0x00000202 |
| 74 | |
| 75 | /* sdram */ |
| 76 | #define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ |
| 77 | #define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 |
| 78 | #define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 |
| 79 | #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ |
| 80 | #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 81 | #define CONFIG_SYS_SDRAM CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */ |
Andreas Bießmann | 309aeaf | 2010-12-04 11:31:46 +0000 | [diff] [blame] | 82 | #define CONFIG_SYS_SDRAM1 (CONFIG_SYS_SDRAM_BASE+0x80) |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 83 | #define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ |
| 84 | #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ |
| 85 | #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ |
| 86 | #define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ |
| 87 | #define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ |
| 88 | #define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 89 | #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ |
| 90 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 91 | /* |
| 92 | * Hardware drivers |
| 93 | */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 94 | /* |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 95 | * Choose a USART for serial console |
| 96 | * CONFIG_DBGU is DBGU unit on J10 |
| 97 | * CONFIG_USART1 is USART1 on J14 |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 98 | */ |
Andreas Bießmann | f9d3f91 | 2011-06-12 01:49:14 +0000 | [diff] [blame] | 99 | #define CONFIG_ATMEL_USART |
| 100 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
| 101 | #define CONFIG_USART_ID 0/* ignored in arm */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 102 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 103 | /* |
| 104 | * Command line configuration. |
| 105 | */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 106 | |
| 107 | /* |
| 108 | * Network Driver Setting |
| 109 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 110 | #define CONFIG_DRIVER_AT91EMAC |
| 111 | #define CONFIG_SYS_RX_ETH_BUFFER 16 |
| 112 | #define CONFIG_RMII |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 113 | |
| 114 | /* |
| 115 | * NOR Flash |
| 116 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 117 | #define CONFIG_SYS_FLASH_BASE 0x10000000 |
| 118 | #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE |
| 119 | #define PHYS_FLASH_SIZE SZ_8M |
| 120 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 121 | #define CONFIG_SYS_MAX_FLASH_SECT 256 |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 122 | |
| 123 | /* |
Andreas Bießmann | 0058d82 | 2010-10-18 22:58:31 +0200 | [diff] [blame] | 124 | * USB Config |
| 125 | */ |
| 126 | #define CONFIG_USB_ATMEL 1 |
Bo Shen | 4a985df | 2013-10-21 16:14:00 +0800 | [diff] [blame] | 127 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
Andreas Bießmann | 0058d82 | 2010-10-18 22:58:31 +0200 | [diff] [blame] | 128 | #define CONFIG_USB_OHCI_NEW 1 |
Andreas Bießmann | 0058d82 | 2010-10-18 22:58:31 +0200 | [diff] [blame] | 129 | |
| 130 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
Jens Scharsig | 58aa563 | 2011-02-19 06:17:02 +0000 | [diff] [blame] | 131 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_USB_HOST_BASE |
Andreas Bießmann | 0058d82 | 2010-10-18 22:58:31 +0200 | [diff] [blame] | 132 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" |
| 133 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 |
| 134 | |
| 135 | /* |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 136 | * Environment Settings |
| 137 | */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 138 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 139 | /* |
| 140 | * after u-boot.bin |
| 141 | */ |
Markus Klotzbuecher | 7bd60e6 | 2019-05-15 15:15:54 +0200 | [diff] [blame] | 142 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 143 | /* The following #defines are needed to get flash environment right */ |
| 144 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 145 | #define CONFIG_SYS_MONITOR_LEN SZ_256K |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 146 | |
| 147 | /* |
| 148 | * Boot option |
| 149 | */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 150 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 151 | /* default load address */ |
| 152 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_16M |
| 153 | #define CONFIG_ENV_OVERWRITE |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 154 | |
| 155 | /* |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 156 | * Shell Settings |
| 157 | */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 158 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 159 | /* |
| 160 | * Size of malloc() pool |
| 161 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 162 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + SZ_128K, \ |
| 163 | SZ_4K) |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 164 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 165 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \ |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 166 | - GENERATED_GBL_DATA_SIZE) |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 167 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 168 | #endif /* __AT91RM9200EK_CONFIG_H__ */ |