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git01.mediatek.com / filogic / uboot / 54d93e2e523074a7c6f236d52328e2c5b2250ff2 / . / arch / arm / dts / tegra114-dalmore.dts
blob: 51ff266d760a69c56d12bd69b021b3c7ed5de8c0 [file] [log] [blame]
Tom Warrenf11e89f2013-01-28 13:32:11 +0000[diff] [blame]1/dts-v1/;
2
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]3#include "tegra114.dtsi"
Tom Warrenf11e89f2013-01-28 13:32:11 +0000[diff] [blame]4
5/ {
6 model = "NVIDIA Dalmore";
7 compatible = "nvidia,dalmore", "nvidia,tegra114";
8
Simon Glass0c24f372014-09-04 16:27:35 -0600[diff] [blame]9 chosen {
10 stdout-path = &uartd;
11 };
12
Tom Warren9b22f832013-03-11 17:07:21 -0700[diff] [blame]13 aliases {
14 i2c0 = "/i2c@7000d000";
15 i2c1 = "/i2c@7000c000";
16 i2c2 = "/i2c@7000c400";
17 i2c3 = "/i2c@7000c500";
18 i2c4 = "/i2c@7000c700";
Tom Warrenbe479a82013-03-18 14:46:46 -0700[diff] [blame]19 sdhci0 = "/sdhci@78000600";
20 sdhci1 = "/sdhci@78000400";
Jim Lindfed30e2013-06-21 19:05:46 +0800[diff] [blame]21 usb0 = "/usb@7d008000";
Tom Warren9b22f832013-03-11 17:07:21 -0700[diff] [blame]22 };
23
Tom Warrenf11e89f2013-01-28 13:32:11 +0000[diff] [blame]24 memory {
25 device_type = "memory";
26 reg = <0x80000000 0x80000000>;
27 };
Tom Warren36092ff2013-02-08 07:25:31 +0000[diff] [blame]28
29 i2c@7000c000 {
30 status = "okay";
31 clock-frequency = <100000>;
32 };
33
34 i2c@7000c400 {
35 status = "okay";
36 clock-frequency = <100000>;
37 };
38
39 i2c@7000c500 {
40 status = "okay";
41 clock-frequency = <100000>;
42 };
43
44 i2c@7000c700 {
45 status = "okay";
46 clock-frequency = <100000>;
47 };
48
49 i2c@7000d000 {
50 status = "okay";
51 clock-frequency = <400000>;
52 };
Allen Martinfc1df282013-03-16 18:58:12 +0000[diff] [blame]53
54 spi@7000da00 {
55 status = "okay";
56 spi-max-frequency = <25000000>;
57 };
Tom Warrenbe479a82013-03-18 14:46:46 -0700[diff] [blame]58
59 sdhci@78000400 {
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]60 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
Tom Warrenbe479a82013-03-18 14:46:46 -0700[diff] [blame]61 bus-width = <4>;
62 status = "okay";
63 };
64
65 sdhci@78000600 {
66 bus-width = <8>;
67 status = "okay";
68 };
Jim Lindfed30e2013-06-21 19:05:46 +0800[diff] [blame]69
70 usb@7d008000 {
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]71 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
Jim Lindfed30e2013-06-21 19:05:46 +0800[diff] [blame]72 status = "okay";
73 };
Tom Warrenf11e89f2013-01-28 13:32:11 +0000[diff] [blame]74};