| commit | 36092ff8ff75f34e9443b87fa413dbf258bfc034 | [log] [tgz] |
|---|---|---|
| author | Tom Warren <twarren.nvidia@gmail.com> | Fri Feb 08 07:25:31 2013 +0000 |
| committer | Tom Warren <twarren@nvidia.com> | Thu Mar 14 11:06:41 2013 -0700 |
| tree | 1d4bc63e6940d611cd965410f16c6ae0b892f68a | |
| parent | f8cf4b23986cf66627c9b9206662c24d4ca51d99 [diff] |
Tegra114: fdt: Update DT files with I2C info for T114/Dalmore T114, like T30, does not have a separate/different DVC (power I2C) controller like T20 - all 5 I2C controllers are identical, but I2C5 is used to designate the controller intended for power control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>