Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Faraday FTGMAC100 Ethernet |
| 4 | * |
| 5 | * (C) Copyright 2009 Faraday Technology |
| 6 | * Po-Yu Chuang <ratbert@faraday-tech.com> |
| 7 | * |
| 8 | * (C) Copyright 2010 Andes Technology |
| 9 | * Macpaul Lin <macpaul@andestech.com> |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 10 | * |
| 11 | * Copyright (C) 2018, IBM Corporation. |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 12 | */ |
| 13 | |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 14 | #include <common.h> |
Cédric Le Goater | 6afa3f1 | 2018-10-29 07:06:36 +0100 | [diff] [blame] | 15 | #include <clk.h> |
Simon Glass | 6333448 | 2019-11-14 12:57:39 -0700 | [diff] [blame] | 16 | #include <cpu_func.h> |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 17 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 18 | #include <log.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 19 | #include <malloc.h> |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 20 | #include <miiphy.h> |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 21 | #include <net.h> |
Cédric Le Goater | 9bcb665 | 2018-10-29 07:06:35 +0100 | [diff] [blame] | 22 | #include <wait_bit.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 23 | #include <asm/cache.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 24 | #include <dm/device_compat.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 25 | #include <linux/bitops.h> |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 26 | #include <linux/io.h> |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 27 | #include <linux/iopoll.h> |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 28 | |
| 29 | #include "ftgmac100.h" |
| 30 | |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 31 | /* Min frame ethernet frame size without FCS */ |
| 32 | #define ETH_ZLEN 60 |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 33 | |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 34 | /* Receive Buffer Size Register - HW default is 0x640 */ |
| 35 | #define FTGMAC100_RBSR_DEFAULT 0x640 |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 36 | |
| 37 | /* PKTBUFSTX/PKTBUFSRX must both be power of 2 */ |
| 38 | #define PKTBUFSTX 4 /* must be power of 2 */ |
| 39 | |
Cédric Le Goater | 9bcb665 | 2018-10-29 07:06:35 +0100 | [diff] [blame] | 40 | /* Timeout for transmit */ |
| 41 | #define FTGMAC100_TX_TIMEOUT_MS 1000 |
| 42 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 43 | /* Timeout for a mdio read/write operation */ |
| 44 | #define FTGMAC100_MDIO_TIMEOUT_USEC 10000 |
| 45 | |
| 46 | /* |
| 47 | * MDC clock cycle threshold |
| 48 | * |
| 49 | * 20us * 100 = 2ms > (1 / 2.5Mhz) * 0x34 |
| 50 | */ |
| 51 | #define MDC_CYCTHR 0x34 |
| 52 | |
Cédric Le Goater | 35efcbb | 2018-10-29 07:06:38 +0100 | [diff] [blame] | 53 | /* |
| 54 | * ftgmac100 model variants |
| 55 | */ |
| 56 | enum ftgmac100_model { |
| 57 | FTGMAC100_MODEL_FARADAY, |
| 58 | FTGMAC100_MODEL_ASPEED, |
| 59 | }; |
| 60 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 61 | /** |
| 62 | * struct ftgmac100_data - private data for the FTGMAC100 driver |
| 63 | * |
| 64 | * @iobase: The base address of the hardware registers |
| 65 | * @txdes: The array of transmit descriptors |
| 66 | * @rxdes: The array of receive descriptors |
| 67 | * @tx_index: Transmit descriptor index in @txdes |
| 68 | * @rx_index: Receive descriptor index in @rxdes |
| 69 | * @phy_addr: The PHY interface address to use |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 70 | * @phydev: The PHY device backing the MAC |
| 71 | * @bus: The mdio bus |
| 72 | * @phy_mode: The mode of the PHY interface (rgmii, rmii, ...) |
| 73 | * @max_speed: Maximum speed of Ethernet connection supported by MAC |
Cédric Le Goater | 6afa3f1 | 2018-10-29 07:06:36 +0100 | [diff] [blame] | 74 | * @clks: The bulk of clocks assigned to the device in the DT |
Cédric Le Goater | 35efcbb | 2018-10-29 07:06:38 +0100 | [diff] [blame] | 75 | * @rxdes0_edorr_mask: The bit number identifying the end of the RX ring buffer |
| 76 | * @txdes0_edotr_mask: The bit number identifying the end of the TX ring buffer |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 77 | */ |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 78 | struct ftgmac100_data { |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 79 | struct ftgmac100 *iobase; |
| 80 | |
Cédric Le Goater | 0404e9f | 2019-11-28 13:37:04 +0100 | [diff] [blame] | 81 | struct ftgmac100_txdes txdes[PKTBUFSTX] __aligned(ARCH_DMA_MINALIGN); |
| 82 | struct ftgmac100_rxdes rxdes[PKTBUFSRX] __aligned(ARCH_DMA_MINALIGN); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 83 | int tx_index; |
| 84 | int rx_index; |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 85 | |
| 86 | u32 phy_addr; |
| 87 | struct phy_device *phydev; |
| 88 | struct mii_dev *bus; |
| 89 | u32 phy_mode; |
| 90 | u32 max_speed; |
Cédric Le Goater | 6afa3f1 | 2018-10-29 07:06:36 +0100 | [diff] [blame] | 91 | |
| 92 | struct clk_bulk clks; |
Cédric Le Goater | 35efcbb | 2018-10-29 07:06:38 +0100 | [diff] [blame] | 93 | |
| 94 | /* End of RX/TX ring buffer bits. Depend on model */ |
| 95 | u32 rxdes0_edorr_mask; |
| 96 | u32 txdes0_edotr_mask; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 97 | }; |
| 98 | |
| 99 | /* |
| 100 | * struct mii_bus functions |
| 101 | */ |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 102 | static int ftgmac100_mdio_read(struct mii_dev *bus, int phy_addr, int dev_addr, |
| 103 | int reg_addr) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 104 | { |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 105 | struct ftgmac100_data *priv = bus->priv; |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 106 | struct ftgmac100 *ftgmac100 = priv->iobase; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 107 | int phycr; |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 108 | int data; |
| 109 | int ret; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 110 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 111 | phycr = FTGMAC100_PHYCR_MDC_CYCTHR(MDC_CYCTHR) | |
| 112 | FTGMAC100_PHYCR_PHYAD(phy_addr) | |
| 113 | FTGMAC100_PHYCR_REGAD(reg_addr) | |
| 114 | FTGMAC100_PHYCR_MIIRD; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 115 | writel(phycr, &ftgmac100->phycr); |
| 116 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 117 | ret = readl_poll_timeout(&ftgmac100->phycr, phycr, |
| 118 | !(phycr & FTGMAC100_PHYCR_MIIRD), |
| 119 | FTGMAC100_MDIO_TIMEOUT_USEC); |
| 120 | if (ret) { |
| 121 | pr_err("%s: mdio read failed (phy:%d reg:%x)\n", |
| 122 | priv->phydev->dev->name, phy_addr, reg_addr); |
| 123 | return ret; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 124 | } |
| 125 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 126 | data = readl(&ftgmac100->phydata); |
| 127 | |
| 128 | return FTGMAC100_PHYDATA_MIIRDATA(data); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 129 | } |
| 130 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 131 | static int ftgmac100_mdio_write(struct mii_dev *bus, int phy_addr, int dev_addr, |
| 132 | int reg_addr, u16 value) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 133 | { |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 134 | struct ftgmac100_data *priv = bus->priv; |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 135 | struct ftgmac100 *ftgmac100 = priv->iobase; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 136 | int phycr; |
| 137 | int data; |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 138 | int ret; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 139 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 140 | phycr = FTGMAC100_PHYCR_MDC_CYCTHR(MDC_CYCTHR) | |
| 141 | FTGMAC100_PHYCR_PHYAD(phy_addr) | |
| 142 | FTGMAC100_PHYCR_REGAD(reg_addr) | |
| 143 | FTGMAC100_PHYCR_MIIWR; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 144 | data = FTGMAC100_PHYDATA_MIIWDATA(value); |
| 145 | |
| 146 | writel(data, &ftgmac100->phydata); |
| 147 | writel(phycr, &ftgmac100->phycr); |
| 148 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 149 | ret = readl_poll_timeout(&ftgmac100->phycr, phycr, |
| 150 | !(phycr & FTGMAC100_PHYCR_MIIWR), |
| 151 | FTGMAC100_MDIO_TIMEOUT_USEC); |
| 152 | if (ret) { |
| 153 | pr_err("%s: mdio write failed (phy:%d reg:%x)\n", |
| 154 | priv->phydev->dev->name, phy_addr, reg_addr); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 155 | } |
| 156 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 157 | return ret; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 158 | } |
| 159 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 160 | static int ftgmac100_mdio_init(struct udevice *dev) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 161 | { |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 162 | struct ftgmac100_data *priv = dev_get_priv(dev); |
| 163 | struct mii_dev *bus; |
| 164 | int ret; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 165 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 166 | bus = mdio_alloc(); |
| 167 | if (!bus) |
| 168 | return -ENOMEM; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 169 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 170 | bus->read = ftgmac100_mdio_read; |
| 171 | bus->write = ftgmac100_mdio_write; |
| 172 | bus->priv = priv; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 173 | |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 174 | ret = mdio_register_seq(bus, dev_seq(dev)); |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 175 | if (ret) { |
| 176 | free(bus); |
| 177 | return ret; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 178 | } |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 179 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 180 | priv->bus = bus; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 181 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 182 | return 0; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 183 | } |
| 184 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 185 | static int ftgmac100_phy_adjust_link(struct ftgmac100_data *priv) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 186 | { |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 187 | struct ftgmac100 *ftgmac100 = priv->iobase; |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 188 | struct phy_device *phydev = priv->phydev; |
| 189 | u32 maccr; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 190 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 191 | if (!phydev->link) { |
| 192 | dev_err(phydev->dev, "No link\n"); |
| 193 | return -EREMOTEIO; |
| 194 | } |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 195 | |
| 196 | /* read MAC control register and clear related bits */ |
| 197 | maccr = readl(&ftgmac100->maccr) & |
| 198 | ~(FTGMAC100_MACCR_GIGA_MODE | |
| 199 | FTGMAC100_MACCR_FAST_MODE | |
| 200 | FTGMAC100_MACCR_FULLDUP); |
| 201 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 202 | if (phy_interface_is_rgmii(phydev) && phydev->speed == 1000) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 203 | maccr |= FTGMAC100_MACCR_GIGA_MODE; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 204 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 205 | if (phydev->speed == 100) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 206 | maccr |= FTGMAC100_MACCR_FAST_MODE; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 207 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 208 | if (phydev->duplex) |
| 209 | maccr |= FTGMAC100_MACCR_FULLDUP; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 210 | |
| 211 | /* update MII config into maccr */ |
| 212 | writel(maccr, &ftgmac100->maccr); |
| 213 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 214 | return 0; |
| 215 | } |
| 216 | |
| 217 | static int ftgmac100_phy_init(struct udevice *dev) |
| 218 | { |
| 219 | struct ftgmac100_data *priv = dev_get_priv(dev); |
| 220 | struct phy_device *phydev; |
| 221 | int ret; |
| 222 | |
| 223 | phydev = phy_connect(priv->bus, priv->phy_addr, dev, priv->phy_mode); |
| 224 | if (!phydev) |
| 225 | return -ENODEV; |
| 226 | |
| 227 | phydev->supported &= PHY_GBIT_FEATURES; |
| 228 | if (priv->max_speed) { |
| 229 | ret = phy_set_supported(phydev, priv->max_speed); |
| 230 | if (ret) |
| 231 | return ret; |
| 232 | } |
| 233 | phydev->advertising = phydev->supported; |
| 234 | priv->phydev = phydev; |
| 235 | phy_config(phydev); |
| 236 | |
| 237 | return 0; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 238 | } |
| 239 | |
| 240 | /* |
| 241 | * Reset MAC |
| 242 | */ |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 243 | static void ftgmac100_reset(struct ftgmac100_data *priv) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 244 | { |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 245 | struct ftgmac100 *ftgmac100 = priv->iobase; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 246 | |
| 247 | debug("%s()\n", __func__); |
| 248 | |
Cédric Le Goater | cef951c | 2018-10-29 07:06:32 +0100 | [diff] [blame] | 249 | setbits_le32(&ftgmac100->maccr, FTGMAC100_MACCR_SW_RST); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 250 | |
| 251 | while (readl(&ftgmac100->maccr) & FTGMAC100_MACCR_SW_RST) |
| 252 | ; |
| 253 | } |
| 254 | |
| 255 | /* |
| 256 | * Set MAC address |
| 257 | */ |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 258 | static int ftgmac100_set_mac(struct ftgmac100_data *priv, |
| 259 | const unsigned char *mac) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 260 | { |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 261 | struct ftgmac100 *ftgmac100 = priv->iobase; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 262 | unsigned int maddr = mac[0] << 8 | mac[1]; |
| 263 | unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5]; |
| 264 | |
| 265 | debug("%s(%x %x)\n", __func__, maddr, laddr); |
| 266 | |
| 267 | writel(maddr, &ftgmac100->mac_madr); |
| 268 | writel(laddr, &ftgmac100->mac_ladr); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 269 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 270 | return 0; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 271 | } |
| 272 | |
| 273 | /* |
| 274 | * disable transmitter, receiver |
| 275 | */ |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 276 | static void ftgmac100_stop(struct udevice *dev) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 277 | { |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 278 | struct ftgmac100_data *priv = dev_get_priv(dev); |
| 279 | struct ftgmac100 *ftgmac100 = priv->iobase; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 280 | |
| 281 | debug("%s()\n", __func__); |
| 282 | |
| 283 | writel(0, &ftgmac100->maccr); |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 284 | |
| 285 | phy_shutdown(priv->phydev); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 286 | } |
| 287 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 288 | static int ftgmac100_start(struct udevice *dev) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 289 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 290 | struct eth_pdata *plat = dev_get_plat(dev); |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 291 | struct ftgmac100_data *priv = dev_get_priv(dev); |
| 292 | struct ftgmac100 *ftgmac100 = priv->iobase; |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 293 | struct phy_device *phydev = priv->phydev; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 294 | unsigned int maccr; |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 295 | ulong start, end; |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 296 | int ret; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 297 | int i; |
| 298 | |
| 299 | debug("%s()\n", __func__); |
| 300 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 301 | ftgmac100_reset(priv); |
| 302 | |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 303 | /* set the ethernet address */ |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 304 | ftgmac100_set_mac(priv, plat->enetaddr); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 305 | |
| 306 | /* disable all interrupts */ |
| 307 | writel(0, &ftgmac100->ier); |
| 308 | |
| 309 | /* initialize descriptors */ |
| 310 | priv->tx_index = 0; |
| 311 | priv->rx_index = 0; |
| 312 | |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 313 | for (i = 0; i < PKTBUFSTX; i++) { |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 314 | priv->txdes[i].txdes3 = 0; |
| 315 | priv->txdes[i].txdes0 = 0; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 316 | } |
Cédric Le Goater | 35efcbb | 2018-10-29 07:06:38 +0100 | [diff] [blame] | 317 | priv->txdes[PKTBUFSTX - 1].txdes0 = priv->txdes0_edotr_mask; |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 318 | |
Cédric Le Goater | 0404e9f | 2019-11-28 13:37:04 +0100 | [diff] [blame] | 319 | start = ((ulong)&priv->txdes[0]) & ~(ARCH_DMA_MINALIGN - 1); |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 320 | end = start + roundup(sizeof(priv->txdes), ARCH_DMA_MINALIGN); |
| 321 | flush_dcache_range(start, end); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 322 | |
| 323 | for (i = 0; i < PKTBUFSRX; i++) { |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 324 | priv->rxdes[i].rxdes3 = (unsigned int)net_rx_packets[i]; |
| 325 | priv->rxdes[i].rxdes0 = 0; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 326 | } |
Cédric Le Goater | 35efcbb | 2018-10-29 07:06:38 +0100 | [diff] [blame] | 327 | priv->rxdes[PKTBUFSRX - 1].rxdes0 = priv->rxdes0_edorr_mask; |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 328 | |
Cédric Le Goater | 0404e9f | 2019-11-28 13:37:04 +0100 | [diff] [blame] | 329 | start = ((ulong)&priv->rxdes[0]) & ~(ARCH_DMA_MINALIGN - 1); |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 330 | end = start + roundup(sizeof(priv->rxdes), ARCH_DMA_MINALIGN); |
| 331 | flush_dcache_range(start, end); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 332 | |
| 333 | /* transmit ring */ |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 334 | writel((u32)priv->txdes, &ftgmac100->txr_badr); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 335 | |
| 336 | /* receive ring */ |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 337 | writel((u32)priv->rxdes, &ftgmac100->rxr_badr); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 338 | |
| 339 | /* poll receive descriptor automatically */ |
| 340 | writel(FTGMAC100_APTC_RXPOLL_CNT(1), &ftgmac100->aptc); |
| 341 | |
| 342 | /* config receive buffer size register */ |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 343 | writel(FTGMAC100_RBSR_SIZE(FTGMAC100_RBSR_DEFAULT), &ftgmac100->rbsr); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 344 | |
| 345 | /* enable transmitter, receiver */ |
| 346 | maccr = FTGMAC100_MACCR_TXMAC_EN | |
| 347 | FTGMAC100_MACCR_RXMAC_EN | |
| 348 | FTGMAC100_MACCR_TXDMA_EN | |
| 349 | FTGMAC100_MACCR_RXDMA_EN | |
| 350 | FTGMAC100_MACCR_CRC_APD | |
| 351 | FTGMAC100_MACCR_FULLDUP | |
| 352 | FTGMAC100_MACCR_RX_RUNT | |
| 353 | FTGMAC100_MACCR_RX_BROADPKT; |
| 354 | |
| 355 | writel(maccr, &ftgmac100->maccr); |
| 356 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 357 | ret = phy_startup(phydev); |
| 358 | if (ret) { |
| 359 | dev_err(phydev->dev, "Could not start PHY\n"); |
| 360 | return ret; |
| 361 | } |
| 362 | |
| 363 | ret = ftgmac100_phy_adjust_link(priv); |
| 364 | if (ret) { |
| 365 | dev_err(phydev->dev, "Could not adjust link\n"); |
| 366 | return ret; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 367 | } |
| 368 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 369 | printf("%s: link up, %d Mbps %s-duplex mac:%pM\n", phydev->dev->name, |
| 370 | phydev->speed, phydev->duplex ? "full" : "half", plat->enetaddr); |
| 371 | |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 372 | return 0; |
| 373 | } |
| 374 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 375 | static int ftgmac100_free_pkt(struct udevice *dev, uchar *packet, int length) |
| 376 | { |
| 377 | struct ftgmac100_data *priv = dev_get_priv(dev); |
| 378 | struct ftgmac100_rxdes *curr_des = &priv->rxdes[priv->rx_index]; |
Cédric Le Goater | 0404e9f | 2019-11-28 13:37:04 +0100 | [diff] [blame] | 379 | ulong des_start = ((ulong)curr_des) & ~(ARCH_DMA_MINALIGN - 1); |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 380 | ulong des_end = des_start + |
| 381 | roundup(sizeof(*curr_des), ARCH_DMA_MINALIGN); |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 382 | |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 383 | /* Release buffer to DMA and flush descriptor */ |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 384 | curr_des->rxdes0 &= ~FTGMAC100_RXDES0_RXPKT_RDY; |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 385 | flush_dcache_range(des_start, des_end); |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 386 | |
| 387 | /* Move to next descriptor */ |
| 388 | priv->rx_index = (priv->rx_index + 1) % PKTBUFSRX; |
| 389 | |
| 390 | return 0; |
| 391 | } |
| 392 | |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 393 | /* |
| 394 | * Get a data block via Ethernet |
| 395 | */ |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 396 | static int ftgmac100_recv(struct udevice *dev, int flags, uchar **packetp) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 397 | { |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 398 | struct ftgmac100_data *priv = dev_get_priv(dev); |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 399 | struct ftgmac100_rxdes *curr_des = &priv->rxdes[priv->rx_index]; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 400 | unsigned short rxlen; |
Cédric Le Goater | 0404e9f | 2019-11-28 13:37:04 +0100 | [diff] [blame] | 401 | ulong des_start = ((ulong)curr_des) & ~(ARCH_DMA_MINALIGN - 1); |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 402 | ulong des_end = des_start + |
| 403 | roundup(sizeof(*curr_des), ARCH_DMA_MINALIGN); |
| 404 | ulong data_start = curr_des->rxdes3; |
| 405 | ulong data_end; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 406 | |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 407 | invalidate_dcache_range(des_start, des_end); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 408 | |
| 409 | if (!(curr_des->rxdes0 & FTGMAC100_RXDES0_RXPKT_RDY)) |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 410 | return -EAGAIN; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 411 | |
| 412 | if (curr_des->rxdes0 & (FTGMAC100_RXDES0_RX_ERR | |
| 413 | FTGMAC100_RXDES0_CRC_ERR | |
| 414 | FTGMAC100_RXDES0_FTL | |
| 415 | FTGMAC100_RXDES0_RUNT | |
| 416 | FTGMAC100_RXDES0_RX_ODD_NB)) { |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 417 | return -EAGAIN; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 418 | } |
| 419 | |
| 420 | rxlen = FTGMAC100_RXDES0_VDBC(curr_des->rxdes0); |
| 421 | |
| 422 | debug("%s(): RX buffer %d, %x received\n", |
| 423 | __func__, priv->rx_index, rxlen); |
| 424 | |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 425 | /* Invalidate received data */ |
| 426 | data_end = data_start + roundup(rxlen, ARCH_DMA_MINALIGN); |
| 427 | invalidate_dcache_range(data_start, data_end); |
| 428 | *packetp = (uchar *)data_start; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 429 | |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 430 | return rxlen; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 431 | } |
| 432 | |
Cédric Le Goater | 9bcb665 | 2018-10-29 07:06:35 +0100 | [diff] [blame] | 433 | static u32 ftgmac100_read_txdesc(const void *desc) |
| 434 | { |
| 435 | const struct ftgmac100_txdes *txdes = desc; |
Cédric Le Goater | 0404e9f | 2019-11-28 13:37:04 +0100 | [diff] [blame] | 436 | ulong des_start = ((ulong)txdes) & ~(ARCH_DMA_MINALIGN - 1); |
Cédric Le Goater | 9bcb665 | 2018-10-29 07:06:35 +0100 | [diff] [blame] | 437 | ulong des_end = des_start + roundup(sizeof(*txdes), ARCH_DMA_MINALIGN); |
| 438 | |
| 439 | invalidate_dcache_range(des_start, des_end); |
| 440 | |
| 441 | return txdes->txdes0; |
| 442 | } |
| 443 | |
| 444 | BUILD_WAIT_FOR_BIT(ftgmac100_txdone, u32, ftgmac100_read_txdesc) |
| 445 | |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 446 | /* |
| 447 | * Send a data block via Ethernet |
| 448 | */ |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 449 | static int ftgmac100_send(struct udevice *dev, void *packet, int length) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 450 | { |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 451 | struct ftgmac100_data *priv = dev_get_priv(dev); |
| 452 | struct ftgmac100 *ftgmac100 = priv->iobase; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 453 | struct ftgmac100_txdes *curr_des = &priv->txdes[priv->tx_index]; |
Cédric Le Goater | 0404e9f | 2019-11-28 13:37:04 +0100 | [diff] [blame] | 454 | ulong des_start = ((ulong)curr_des) & ~(ARCH_DMA_MINALIGN - 1); |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 455 | ulong des_end = des_start + |
| 456 | roundup(sizeof(*curr_des), ARCH_DMA_MINALIGN); |
| 457 | ulong data_start; |
| 458 | ulong data_end; |
Cédric Le Goater | 9bcb665 | 2018-10-29 07:06:35 +0100 | [diff] [blame] | 459 | int rc; |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 460 | |
| 461 | invalidate_dcache_range(des_start, des_end); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 462 | |
| 463 | if (curr_des->txdes0 & FTGMAC100_TXDES0_TXDMA_OWN) { |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 464 | dev_err(dev, "no TX descriptor available\n"); |
| 465 | return -EPERM; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 466 | } |
| 467 | |
| 468 | debug("%s(%x, %x)\n", __func__, (int)packet, length); |
| 469 | |
| 470 | length = (length < ETH_ZLEN) ? ETH_ZLEN : length; |
| 471 | |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 472 | curr_des->txdes3 = (unsigned int)packet; |
| 473 | |
| 474 | /* Flush data to be sent */ |
| 475 | data_start = curr_des->txdes3; |
| 476 | data_end = data_start + roundup(length, ARCH_DMA_MINALIGN); |
| 477 | flush_dcache_range(data_start, data_end); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 478 | |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 479 | /* Only one segment on TXBUF */ |
Cédric Le Goater | 35efcbb | 2018-10-29 07:06:38 +0100 | [diff] [blame] | 480 | curr_des->txdes0 &= priv->txdes0_edotr_mask; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 481 | curr_des->txdes0 |= FTGMAC100_TXDES0_FTS | |
| 482 | FTGMAC100_TXDES0_LTS | |
| 483 | FTGMAC100_TXDES0_TXBUF_SIZE(length) | |
| 484 | FTGMAC100_TXDES0_TXDMA_OWN ; |
| 485 | |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 486 | /* Flush modified buffer descriptor */ |
| 487 | flush_dcache_range(des_start, des_end); |
| 488 | |
| 489 | /* Start transmit */ |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 490 | writel(1, &ftgmac100->txpd); |
| 491 | |
Cédric Le Goater | 9bcb665 | 2018-10-29 07:06:35 +0100 | [diff] [blame] | 492 | rc = wait_for_bit_ftgmac100_txdone(curr_des, |
| 493 | FTGMAC100_TXDES0_TXDMA_OWN, false, |
| 494 | FTGMAC100_TX_TIMEOUT_MS, true); |
| 495 | if (rc) |
| 496 | return rc; |
| 497 | |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 498 | debug("%s(): packet sent\n", __func__); |
| 499 | |
Cédric Le Goater | 3174dfb | 2018-10-29 07:06:34 +0100 | [diff] [blame] | 500 | /* Move to next descriptor */ |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 501 | priv->tx_index = (priv->tx_index + 1) % PKTBUFSTX; |
| 502 | |
| 503 | return 0; |
| 504 | } |
| 505 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 506 | static int ftgmac100_write_hwaddr(struct udevice *dev) |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 507 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 508 | struct eth_pdata *pdata = dev_get_plat(dev); |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 509 | struct ftgmac100_data *priv = dev_get_priv(dev); |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 510 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 511 | return ftgmac100_set_mac(priv, pdata->enetaddr); |
| 512 | } |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 513 | |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 514 | static int ftgmac100_of_to_plat(struct udevice *dev) |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 515 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 516 | struct eth_pdata *pdata = dev_get_plat(dev); |
Cédric Le Goater | 6afa3f1 | 2018-10-29 07:06:36 +0100 | [diff] [blame] | 517 | struct ftgmac100_data *priv = dev_get_priv(dev); |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 518 | const char *phy_mode; |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 519 | |
Masahiro Yamada | a89b4de | 2020-07-17 14:36:48 +0900 | [diff] [blame] | 520 | pdata->iobase = dev_read_addr(dev); |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 521 | pdata->phy_interface = -1; |
| 522 | phy_mode = dev_read_string(dev, "phy-mode"); |
| 523 | if (phy_mode) |
| 524 | pdata->phy_interface = phy_get_interface_by_name(phy_mode); |
| 525 | if (pdata->phy_interface == -1) { |
| 526 | dev_err(dev, "Invalid PHY interface '%s'\n", phy_mode); |
| 527 | return -EINVAL; |
| 528 | } |
| 529 | |
| 530 | pdata->max_speed = dev_read_u32_default(dev, "max-speed", 0); |
| 531 | |
Cédric Le Goater | 35efcbb | 2018-10-29 07:06:38 +0100 | [diff] [blame] | 532 | if (dev_get_driver_data(dev) == FTGMAC100_MODEL_ASPEED) { |
| 533 | priv->rxdes0_edorr_mask = BIT(30); |
| 534 | priv->txdes0_edotr_mask = BIT(30); |
| 535 | } else { |
| 536 | priv->rxdes0_edorr_mask = BIT(15); |
| 537 | priv->txdes0_edotr_mask = BIT(15); |
| 538 | } |
| 539 | |
Cédric Le Goater | 6afa3f1 | 2018-10-29 07:06:36 +0100 | [diff] [blame] | 540 | return clk_get_bulk(dev, &priv->clks); |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 541 | } |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 542 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 543 | static int ftgmac100_probe(struct udevice *dev) |
| 544 | { |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 545 | struct eth_pdata *pdata = dev_get_plat(dev); |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 546 | struct ftgmac100_data *priv = dev_get_priv(dev); |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 547 | int ret; |
Macpaul Lin | c56c5a3 | 2011-09-20 19:54:32 +0000 | [diff] [blame] | 548 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 549 | priv->iobase = (struct ftgmac100 *)pdata->iobase; |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 550 | priv->phy_mode = pdata->phy_interface; |
| 551 | priv->max_speed = pdata->max_speed; |
| 552 | priv->phy_addr = 0; |
| 553 | |
Thirupathaiah Annapureddy | 22bb377 | 2020-08-17 17:08:26 -0700 | [diff] [blame] | 554 | #ifdef CONFIG_PHY_ADDR |
| 555 | priv->phy_addr = CONFIG_PHY_ADDR; |
| 556 | #endif |
| 557 | |
Cédric Le Goater | 6afa3f1 | 2018-10-29 07:06:36 +0100 | [diff] [blame] | 558 | ret = clk_enable_bulk(&priv->clks); |
| 559 | if (ret) |
| 560 | goto out; |
| 561 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 562 | ret = ftgmac100_mdio_init(dev); |
| 563 | if (ret) { |
| 564 | dev_err(dev, "Failed to initialize mdiobus: %d\n", ret); |
| 565 | goto out; |
| 566 | } |
| 567 | |
| 568 | ret = ftgmac100_phy_init(dev); |
| 569 | if (ret) { |
| 570 | dev_err(dev, "Failed to initialize PHY: %d\n", ret); |
| 571 | goto out; |
| 572 | } |
| 573 | |
| 574 | out: |
Cédric Le Goater | 6afa3f1 | 2018-10-29 07:06:36 +0100 | [diff] [blame] | 575 | if (ret) |
| 576 | clk_release_bulk(&priv->clks); |
| 577 | |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 578 | return ret; |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 579 | } |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 580 | |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 581 | static int ftgmac100_remove(struct udevice *dev) |
| 582 | { |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 583 | struct ftgmac100_data *priv = dev_get_priv(dev); |
| 584 | |
| 585 | free(priv->phydev); |
| 586 | mdio_unregister(priv->bus); |
| 587 | mdio_free(priv->bus); |
Cédric Le Goater | 6afa3f1 | 2018-10-29 07:06:36 +0100 | [diff] [blame] | 588 | clk_release_bulk(&priv->clks); |
Cédric Le Goater | 7f8482a | 2018-10-29 07:06:33 +0100 | [diff] [blame] | 589 | |
Macpaul Lin | 199c625 | 2010-12-21 16:59:46 +0800 | [diff] [blame] | 590 | return 0; |
| 591 | } |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 592 | |
| 593 | static const struct eth_ops ftgmac100_ops = { |
| 594 | .start = ftgmac100_start, |
| 595 | .send = ftgmac100_send, |
| 596 | .recv = ftgmac100_recv, |
| 597 | .stop = ftgmac100_stop, |
| 598 | .free_pkt = ftgmac100_free_pkt, |
| 599 | .write_hwaddr = ftgmac100_write_hwaddr, |
| 600 | }; |
| 601 | |
| 602 | static const struct udevice_id ftgmac100_ids[] = { |
Cédric Le Goater | 35efcbb | 2018-10-29 07:06:38 +0100 | [diff] [blame] | 603 | { .compatible = "faraday,ftgmac100", .data = FTGMAC100_MODEL_FARADAY }, |
| 604 | { .compatible = "aspeed,ast2500-mac", .data = FTGMAC100_MODEL_ASPEED }, |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 605 | { } |
| 606 | }; |
| 607 | |
| 608 | U_BOOT_DRIVER(ftgmac100) = { |
| 609 | .name = "ftgmac100", |
| 610 | .id = UCLASS_ETH, |
| 611 | .of_match = ftgmac100_ids, |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 612 | .of_to_plat = ftgmac100_of_to_plat, |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 613 | .probe = ftgmac100_probe, |
| 614 | .remove = ftgmac100_remove, |
| 615 | .ops = &ftgmac100_ops, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 616 | .priv_auto = sizeof(struct ftgmac100_data), |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 617 | .plat_auto = sizeof(struct eth_pdata), |
Cédric Le Goater | 38b33e9 | 2018-10-29 07:06:31 +0100 | [diff] [blame] | 618 | .flags = DM_FLAG_ALLOC_PRIV_DMA, |
| 619 | }; |