blob: 2c387630a61e7438f72f60030dd5f901f2d7087a [file] [log] [blame]
Michal Simek4b066a12018-08-22 14:55:27 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2014 - 2018 Xilinx, Inc.
Michal Simeka8c94362023-07-10 14:35:49 +02004 * Michal Simek <michal.simek@amd.com>
Michal Simek4b066a12018-08-22 14:55:27 +02005 */
6
Algapally Santosh Sagar3c351b22023-01-19 22:36:16 -07007#include <command.h>
Simon Glassafb02152019-12-28 10:45:01 -07008#include <cpu_func.h>
Venkatesh Yadav Abbarapu88990e92025-01-06 14:36:30 +05309#include <dfu.h>
Simon Glassed38aef2020-05-10 11:40:03 -060010#include <env.h>
Michal Simek806be2d2025-02-26 16:35:45 -060011#include <efi_loader.h>
Michal Simek4b066a12018-08-22 14:55:27 +020012#include <fdtdec.h>
Simon Glassa7b51302019-11-14 12:57:46 -070013#include <init.h>
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -070014#include <env_internal.h>
Simon Glass0f2af882020-05-10 11:40:05 -060015#include <log.h>
Michal Simek4b066a12018-08-22 14:55:27 +020016#include <malloc.h>
Michal Simek444a70e2024-10-25 13:56:08 +020017#include <memalign.h>
18#include <mmc.h>
Michal Simek754b53c2024-12-05 11:38:15 +010019#include <mtd.h>
Simon Glass495a5dc2019-11-14 12:57:30 -070020#include <time.h>
Simon Glass274e0b02020-05-10 11:39:56 -060021#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060022#include <asm/global_data.h>
Michal Simek4b066a12018-08-22 14:55:27 +020023#include <asm/io.h>
24#include <asm/arch/hardware.h>
Michal Simek21eb5cc2019-04-29 09:39:09 -070025#include <asm/arch/sys_proto.h>
Michal Simek444a70e2024-10-25 13:56:08 +020026#include <linux/sizes.h>
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +053027#include <dm/device.h>
28#include <dm/uclass.h>
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053029#include <versalpl.h>
Michal Simek705d44a2020-03-31 12:39:37 +020030#include "../common/board.h"
Michal Simek4b066a12018-08-22 14:55:27 +020031
32DECLARE_GLOBAL_DATA_PTR;
33
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053034#if defined(CONFIG_FPGA_VERSALPL)
Oleksandr Suvorovdae95a42022-07-22 17:16:04 +030035static xilinx_desc versalpl = {
36 xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
37 FPGA_LEGACY
38};
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053039#endif
40
Michal Simekfec54762025-01-06 10:20:40 +010041static u8 versal_get_bootmode(void)
42{
43 u8 bootmode;
44 u32 reg = 0;
45
46 reg = readl(&crp_base->boot_mode_usr);
47
48 if (reg >> BOOT_MODE_ALT_SHIFT)
49 reg >>= BOOT_MODE_ALT_SHIFT;
50
51 bootmode = reg & BOOT_MODES_MASK;
52
53 return bootmode;
54}
55
Michal Simek76fdafa2024-12-05 11:38:16 +010056static u32 versal_multi_boot(void)
57{
Michal Simekfec54762025-01-06 10:20:40 +010058 u8 bootmode = versal_get_bootmode();
59
60 /* Mostly workaround for QEMU CI pipeline */
61 if (bootmode == JTAG_MODE)
62 return 0;
63
Michal Simek76fdafa2024-12-05 11:38:16 +010064 return readl(0xF1110004);
65}
66
Michal Simek4b066a12018-08-22 14:55:27 +020067int board_init(void)
68{
69 printf("EL Level:\tEL%d\n", current_el());
Michal Simek76fdafa2024-12-05 11:38:16 +010070 printf("Multiboot:\t%d\n", versal_multi_boot());
Michal Simek4b066a12018-08-22 14:55:27 +020071
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053072#if defined(CONFIG_FPGA_VERSALPL)
73 fpga_init();
74 fpga_add(fpga_xilinx, &versalpl);
75#endif
76
Michal Simek394ee242020-08-03 13:01:45 +020077 if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM))
78 xilinx_read_eeprom();
79
Michal Simek4b066a12018-08-22 14:55:27 +020080 return 0;
81}
82
83int board_early_init_r(void)
84{
Michal Simek19f6c972019-01-28 11:08:00 +010085 u32 val;
Michal Simek4b066a12018-08-22 14:55:27 +020086
Michal Simek19f6c972019-01-28 11:08:00 +010087 if (current_el() != 3)
88 return 0;
Michal Simek4b066a12018-08-22 14:55:27 +020089
Michal Simekf56f7d12019-01-28 11:12:41 +010090 debug("iou_switch ctrl div0 %x\n",
91 readl(&crlapb_base->iou_switch_ctrl));
92
Michal Simek19f6c972019-01-28 11:08:00 +010093 writel(IOU_SWITCH_CTRL_CLKACT_BIT |
Michal Simekf56f7d12019-01-28 11:12:41 +010094 (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
Michal Simek19f6c972019-01-28 11:08:00 +010095 &crlapb_base->iou_switch_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +020096
Michal Simek19f6c972019-01-28 11:08:00 +010097 /* Global timer init - Program time stamp reference clk */
98 val = readl(&crlapb_base->timestamp_ref_ctrl);
99 val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
100 writel(val, &crlapb_base->timestamp_ref_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +0200101
Michal Simek19f6c972019-01-28 11:08:00 +0100102 debug("ref ctrl 0x%x\n",
103 readl(&crlapb_base->timestamp_ref_ctrl));
Michal Simek4b066a12018-08-22 14:55:27 +0200104
Michal Simek19f6c972019-01-28 11:08:00 +0100105 /* Clear reset of timestamp reg */
106 writel(0, &crlapb_base->rst_timestamp);
Michal Simek4b066a12018-08-22 14:55:27 +0200107
Michal Simek19f6c972019-01-28 11:08:00 +0100108 /*
109 * Program freq register in System counter and
110 * enable system counter.
111 */
Peng Fan4b3a1822022-04-13 17:47:17 +0800112 writel(CONFIG_COUNTER_FREQUENCY,
Michal Simek19f6c972019-01-28 11:08:00 +0100113 &iou_scntr_secure->base_frequency_id_register);
Michal Simek4b066a12018-08-22 14:55:27 +0200114
Michal Simek19f6c972019-01-28 11:08:00 +0100115 debug("counter val 0x%x\n",
116 readl(&iou_scntr_secure->base_frequency_id_register));
117
118 writel(IOU_SCNTRS_CONTROL_EN,
119 &iou_scntr_secure->counter_control_register);
Michal Simek4b066a12018-08-22 14:55:27 +0200120
Michal Simek19f6c972019-01-28 11:08:00 +0100121 debug("scntrs control 0x%x\n",
122 readl(&iou_scntr_secure->counter_control_register));
123 debug("timer 0x%llx\n", get_ticks());
124 debug("timer 0x%llx\n", get_ticks());
Michal Simek4b066a12018-08-22 14:55:27 +0200125
126 return 0;
127}
128
Ashok Reddy Soma6c191052022-05-05 23:53:45 -0600129unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
130 char *const argv[])
131{
132 int ret = 0;
133
134 if (current_el() > 1) {
135 smp_kick_all_cpus();
136 dcache_disable();
137 armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry,
138 ES_TO_AARCH64);
139 } else {
140 printf("FAIL: current EL is not above EL1\n");
141 ret = EINVAL;
142 }
143 return ret;
144}
145
Michal Simekb1634762023-09-05 13:30:07 +0200146static int boot_targets_setup(void)
Michal Simek9c91e612020-04-08 11:04:41 +0200147{
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530148 u8 bootmode;
149 struct udevice *dev;
150 int bootseq = -1;
151 int bootseq_len = 0;
152 int env_targets_len = 0;
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530153 const char *mode = NULL;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530154 char *new_targets;
155 char *env_targets;
156
Michal Simek9c91e612020-04-08 11:04:41 +0200157 bootmode = versal_get_bootmode();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530158
159 puts("Bootmode: ");
160 switch (bootmode) {
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530161 case USB_MODE:
162 puts("USB_MODE\n");
T Karthik Reddy1104faf2021-03-30 23:24:57 -0600163 mode = "usb_dfu0 usb_dfu1";
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530164 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530165 case JTAG_MODE:
166 puts("JTAG_MODE\n");
Siva Durga Prasad Paladugu00784e02019-06-25 17:13:14 +0530167 mode = "jtag pxe dhcp";
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530168 break;
169 case QSPI_MODE_24BIT:
170 puts("QSPI_MODE_24\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200171 if (uclass_get_device_by_name(UCLASS_SPI,
172 "spi@f1030000", &dev)) {
173 debug("QSPI driver for QSPI device is not present\n");
174 break;
175 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530176 mode = "xspi0";
177 break;
178 case QSPI_MODE_32BIT:
179 puts("QSPI_MODE_32\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200180 if (uclass_get_device_by_name(UCLASS_SPI,
181 "spi@f1030000", &dev)) {
182 debug("QSPI driver for QSPI device is not present\n");
183 break;
184 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530185 mode = "xspi0";
186 break;
187 case OSPI_MODE:
188 puts("OSPI_MODE\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200189 if (uclass_get_device_by_name(UCLASS_SPI,
190 "spi@f1010000", &dev)) {
191 debug("OSPI driver for OSPI device is not present\n");
192 break;
193 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530194 mode = "xspi0";
195 break;
196 case EMMC_MODE:
197 puts("EMMC_MODE\n");
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700198 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100199 "mmc@f1050000", &dev) &&
200 uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700201 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530202 debug("SD1 driver for SD1 device is not present\n");
203 break;
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700204 }
Simon Glass75e534b2020-12-16 21:20:07 -0700205 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700206 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700207 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530208 break;
Polak, Leszekcddfc132023-10-08 14:34:42 +0000209 case SELECTMAP_MODE:
210 puts("SELECTMAP_MODE\n");
211 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530212 case SD_MODE:
213 puts("SD_MODE\n");
214 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100215 "mmc@f1040000", &dev) &&
216 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530217 "sdhci@f1040000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530218 debug("SD0 driver for SD0 device is not present\n");
219 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530220 }
Simon Glass75e534b2020-12-16 21:20:07 -0700221 debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530222
223 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700224 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530225 break;
226 case SD1_LSHFT_MODE:
227 puts("LVL_SHFT_");
228 /* fall through */
229 case SD_MODE1:
230 puts("SD_MODE1\n");
231 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100232 "mmc@f1050000", &dev) &&
233 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530234 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530235 debug("SD1 driver for SD1 device is not present\n");
236 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530237 }
Simon Glass75e534b2020-12-16 21:20:07 -0700238 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530239
240 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700241 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530242 break;
243 default:
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530244 printf("Invalid Boot Mode:0x%x\n", bootmode);
245 break;
246 }
247
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530248 if (mode) {
249 if (bootseq >= 0) {
250 bootseq_len = snprintf(NULL, 0, "%i", bootseq);
251 debug("Bootseq len: %x\n", bootseq_len);
252 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530253
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530254 /*
255 * One terminating char + one byte for space between mode
256 * and default boot_targets
257 */
258 env_targets = env_get("boot_targets");
259 if (env_targets)
260 env_targets_len = strlen(env_targets);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530261
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530262 new_targets = calloc(1, strlen(mode) + env_targets_len + 2 +
263 bootseq_len);
264 if (!new_targets)
265 return -ENOMEM;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530266
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530267 if (bootseq >= 0)
268 sprintf(new_targets, "%s%x %s", mode, bootseq,
269 env_targets ? env_targets : "");
270 else
271 sprintf(new_targets, "%s %s", mode,
272 env_targets ? env_targets : "");
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530273
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530274 env_set("boot_targets", new_targets);
275 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530276
Michal Simekb1634762023-09-05 13:30:07 +0200277 return 0;
278}
279
280int board_late_init(void)
281{
282 int ret;
283
284 if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
285 debug("Saved variables - Skipping\n");
286 return 0;
287 }
288
289 if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
290 return 0;
291
292 if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) {
293 ret = boot_targets_setup();
294 if (ret)
295 return ret;
296 }
297
Michal Simek705d44a2020-03-31 12:39:37 +0200298 return board_late_init_xilinx();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530299}
300
Michal Simek4b066a12018-08-22 14:55:27 +0200301int dram_init_banksize(void)
302{
Michal Simek21eb5cc2019-04-29 09:39:09 -0700303 int ret;
304
305 ret = fdtdec_setup_memory_banksize();
306 if (ret)
307 return ret;
308
309 mem_map_fill();
Michal Simek4b066a12018-08-22 14:55:27 +0200310
311 return 0;
312}
313
314int dram_init(void)
315{
Michal Simek9134d4c2020-07-10 12:42:09 +0200316 if (fdtdec_setup_mem_size_base_lowest() != 0)
Michal Simek4b066a12018-08-22 14:55:27 +0200317 return -EINVAL;
318
319 return 0;
320}
321
Michal Simekc1e98aa2024-10-25 13:56:07 +0200322#if !CONFIG_IS_ENABLED(SYSRESET)
Harald Seiler6f14d5f2020-12-15 16:47:52 +0100323void reset_cpu(void)
Michal Simek4b066a12018-08-22 14:55:27 +0200324{
325}
Michal Simekc1e98aa2024-10-25 13:56:07 +0200326#endif
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700327
Michal Simekf3a541f2024-03-22 12:43:17 +0100328#if defined(CONFIG_ENV_IS_NOWHERE)
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700329enum env_location env_get_location(enum env_operation op, int prio)
330{
331 u32 bootmode = versal_get_bootmode();
332
333 if (prio)
334 return ENVL_UNKNOWN;
335
336 switch (bootmode) {
337 case EMMC_MODE:
338 case SD_MODE:
339 case SD1_LSHFT_MODE:
340 case SD_MODE1:
341 if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
342 return ENVL_FAT;
343 if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
344 return ENVL_EXT4;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100345 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700346 case OSPI_MODE:
347 case QSPI_MODE_24BIT:
348 case QSPI_MODE_32BIT:
349 if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
350 return ENVL_SPI_FLASH;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100351 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700352 case JTAG_MODE:
Polak, Leszekcddfc132023-10-08 14:34:42 +0000353 case SELECTMAP_MODE:
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700354 default:
355 return ENVL_NOWHERE;
356 }
357}
Michal Simekf3a541f2024-03-22 12:43:17 +0100358#endif
Michal Simek444a70e2024-10-25 13:56:08 +0200359
360#if defined(CONFIG_SET_DFU_ALT_INFO)
361
362#define DFU_ALT_BUF_LEN SZ_1K
363
Michal Simek754b53c2024-12-05 11:38:15 +0100364static void mtd_found_part(u32 *base, u32 *size)
365{
366 struct mtd_info *part, *mtd;
367
368 mtd_probe_devices();
369
370 mtd = get_mtd_device_nm("nor0");
371 if (!IS_ERR_OR_NULL(mtd)) {
372 list_for_each_entry(part, &mtd->partitions, node) {
373 debug("0x%012llx-0x%012llx : \"%s\"\n",
374 part->offset, part->offset + part->size,
375 part->name);
376
377 if (*base >= part->offset &&
378 *base < part->offset + part->size) {
379 debug("Found my partition: %d/%s\n",
380 part->index, part->name);
381 *base = part->offset;
382 *size = part->size;
383 break;
384 }
385 }
386 }
387}
388
Michal Simek444a70e2024-10-25 13:56:08 +0200389void set_dfu_alt_info(char *interface, char *devstr)
390{
391 int bootseq = 0, len = 0;
Michal Simek76fdafa2024-12-05 11:38:16 +0100392 u32 multiboot = versal_multi_boot();
Michal Simek444a70e2024-10-25 13:56:08 +0200393 u32 bootmode = versal_get_bootmode();
394
395 ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
396
397 if (env_get("dfu_alt_info"))
398 return;
399
400 memset(buf, 0, sizeof(buf));
401
Michal Simek76fdafa2024-12-05 11:38:16 +0100402 multiboot = env_get_hex("multiboot", multiboot);
403
Michal Simek444a70e2024-10-25 13:56:08 +0200404 switch (bootmode) {
405 case EMMC_MODE:
406 case SD_MODE:
407 case SD1_LSHFT_MODE:
408 case SD_MODE1:
409 bootseq = mmc_get_env_dev();
410
411 len += snprintf(buf + len, DFU_ALT_BUF_LEN, "mmc %d=boot",
412 bootseq);
413
Michal Simek76fdafa2024-12-05 11:38:16 +0100414 if (multiboot)
415 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
416 "%04d", multiboot);
417
Michal Simek444a70e2024-10-25 13:56:08 +0200418 len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1",
419 bootseq);
420 break;
Michal Simek754b53c2024-12-05 11:38:15 +0100421 case QSPI_MODE_24BIT:
422 case QSPI_MODE_32BIT:
423 case OSPI_MODE:
424 {
Michal Simek76fdafa2024-12-05 11:38:16 +0100425 u32 base = multiboot * SZ_32K;
Michal Simek754b53c2024-12-05 11:38:15 +0100426 u32 size = 0x1500000;
427 u32 limit = size;
428
429 mtd_found_part(&base, &limit);
430
431 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
432 "sf 0:0=boot.bin raw 0x%x 0x%x",
433 base, limit);
434 }
435 break;
Michal Simek444a70e2024-10-25 13:56:08 +0200436 default:
437 return;
438 }
439
440 env_set("dfu_alt_info", buf);
441 puts("DFU alt info setting: done\n");
Michal Simek806be2d2025-02-26 16:35:45 -0600442 update_info.dfu_string = strdup(buf);
443 debug("Capsule DFU: %s\n", update_info.dfu_string);
Michal Simek444a70e2024-10-25 13:56:08 +0200444}
445#endif