Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2004-2008 Texas Instruments |
| 4 | * |
| 5 | * (C) Copyright 2002 |
| 6 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
| 10 | OUTPUT_ARCH(arm) |
| 11 | ENTRY(_start) |
| 12 | SECTIONS |
| 13 | { |
| 14 | . = 0x00000000; |
| 15 | |
| 16 | . = ALIGN(4); |
Ilias Apalodimas | cdb5839 | 2024-03-15 08:43:50 +0200 | [diff] [blame] | 17 | __image_copy_start = ADDR(.text); |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 18 | .text : |
| 19 | { |
Masahiro Yamada | 22ea415 | 2014-06-05 19:47:45 +0900 | [diff] [blame] | 20 | *(.vectors) |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 21 | CPUDIR/start.o (.text*) |
Alexander Graf | 94a10f2 | 2018-06-12 07:48:37 +0200 | [diff] [blame] | 22 | } |
| 23 | |
| 24 | /* This needs to come before *(.text*) */ |
Ilias Apalodimas | 772acf8 | 2024-03-15 08:43:51 +0200 | [diff] [blame] | 25 | .efi_runtime : { |
Ilias Apalodimas | 048a9ec | 2024-03-15 08:43:49 +0200 | [diff] [blame] | 26 | __efi_runtime_start = .; |
Alexander Graf | 94a10f2 | 2018-06-12 07:48:37 +0200 | [diff] [blame] | 27 | *(.text.efi_runtime*) |
| 28 | *(.rodata.efi_runtime*) |
| 29 | *(.data.efi_runtime*) |
Ilias Apalodimas | 048a9ec | 2024-03-15 08:43:49 +0200 | [diff] [blame] | 30 | __efi_runtime_stop = .; |
Alexander Graf | 94a10f2 | 2018-06-12 07:48:37 +0200 | [diff] [blame] | 31 | } |
| 32 | |
| 33 | .text_rest : |
| 34 | { |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 35 | *(.text*) |
| 36 | } |
| 37 | |
| 38 | . = ALIGN(4); |
| 39 | .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } |
| 40 | |
| 41 | . = ALIGN(4); |
| 42 | .data : { |
| 43 | *(.data*) |
| 44 | } |
| 45 | |
| 46 | . = ALIGN(4); |
| 47 | |
| 48 | . = .; |
| 49 | |
| 50 | . = ALIGN(4); |
Andrew Scull | 5a9095c | 2022-05-30 10:00:04 +0000 | [diff] [blame] | 51 | __u_boot_list : { |
| 52 | KEEP(*(SORT(__u_boot_list*))); |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 53 | } |
| 54 | |
Ilias Apalodimas | 772acf8 | 2024-03-15 08:43:51 +0200 | [diff] [blame] | 55 | .efi_runtime_rel : { |
Ilias Apalodimas | 9b37894 | 2024-03-15 08:43:47 +0200 | [diff] [blame] | 56 | __efi_runtime_rel_start = .; |
Alexander Graf | 94a10f2 | 2018-06-12 07:48:37 +0200 | [diff] [blame] | 57 | *(.rel*.efi_runtime) |
| 58 | *(.rel*.efi_runtime.*) |
Ilias Apalodimas | 9b37894 | 2024-03-15 08:43:47 +0200 | [diff] [blame] | 59 | __efi_runtime_rel_stop = .; |
Alexander Graf | a56b5f1 | 2017-07-03 13:41:34 +0200 | [diff] [blame] | 60 | } |
| 61 | |
Michal Simek | 02d770a | 2022-08-31 11:28:59 +0200 | [diff] [blame] | 62 | . = ALIGN(8); |
Ilias Apalodimas | cdb5839 | 2024-03-15 08:43:50 +0200 | [diff] [blame] | 63 | __image_copy_end = .; |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 64 | |
Ilias Apalodimas | 45b1bd9 | 2024-03-15 08:43:48 +0200 | [diff] [blame] | 65 | .rel.dyn ALIGN(8) : { |
| 66 | __rel_dyn_start = .; |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 67 | *(.rel*) |
Ilias Apalodimas | 45b1bd9 | 2024-03-15 08:43:48 +0200 | [diff] [blame] | 68 | __rel_dyn_end = .; |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 69 | } |
| 70 | |
Albert ARIBAUD | 9d25fa4 | 2014-02-22 17:53:42 +0100 | [diff] [blame] | 71 | .end : |
| 72 | { |
| 73 | *(.__end) |
| 74 | } |
| 75 | |
| 76 | _image_binary_end = .; |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 77 | |
| 78 | /* |
Ilias Apalodimas | 6d1e1b8 | 2024-03-15 08:43:46 +0200 | [diff] [blame] | 79 | * These sections occupy the same memory, but their lifetimes do |
| 80 | * not overlap: U-Boot initializes .bss only after applying dynamic |
| 81 | * relocations and therefore after it doesn't need .rel.dyn any more. |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 82 | */ |
Ilias Apalodimas | 6d1e1b8 | 2024-03-15 08:43:46 +0200 | [diff] [blame] | 83 | .bss ADDR(.rel.dyn) (OVERLAY): { |
| 84 | __bss_start = .; |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 85 | *(.bss*) |
Ilias Apalodimas | 6d1e1b8 | 2024-03-15 08:43:46 +0200 | [diff] [blame] | 86 | . = ALIGN(8); |
| 87 | __bss_end = .; |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 88 | } |
| 89 | |
| 90 | /* |
Albert ARIBAUD | 9852cc6 | 2014-04-15 16:13:51 +0200 | [diff] [blame] | 91 | * Zynq needs to discard these sections because the user |
Michal Simek | c8cf471 | 2014-02-05 08:06:29 +0100 | [diff] [blame] | 92 | * is expected to pass this image on to tools for boot.bin |
| 93 | * generation that require them to be dropped. |
| 94 | */ |
| 95 | /DISCARD/ : { *(.dynsym) } |
| 96 | /DISCARD/ : { *(.dynbss*) } |
| 97 | /DISCARD/ : { *(.dynstr*) } |
| 98 | /DISCARD/ : { *(.dynamic*) } |
| 99 | /DISCARD/ : { *(.plt*) } |
| 100 | /DISCARD/ : { *(.interp*) } |
| 101 | /DISCARD/ : { *(.gnu*) } |
| 102 | /DISCARD/ : { *(.ARM.exidx*) } |
| 103 | /DISCARD/ : { *(.gnu.linkonce.armexidx.*) } |
| 104 | } |