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Prafulla Wadaskara09bbe52009-06-20 11:01:53 +02001/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * Header file for the Marvell's Feroceon CPU core.
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +02009 */
10
11#ifndef _ASM_ARCH_KIRKWOOD_H
12#define _ASM_ARCH_KIRKWOOD_H
13
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020014#if defined (CONFIG_FEROCEON_88FR131) || defined (CONFIG_SHEEVA_88SV131)
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020015
16/* SOC specific definations */
17#define INTREG_BASE 0xd0000000
18#define KW_REGISTER(x) (KW_REGS_PHY_BASE + x)
19#define KW_OFFSET_REG (INTREG_BASE + 0x20080)
20
21/* undocumented registers */
22#define KW_REG_UNDOC_0x1470 (KW_REGISTER(0x1470))
23#define KW_REG_UNDOC_0x1478 (KW_REGISTER(0x1478))
24
Heiko Schocher60e286b2009-07-16 09:59:10 +020025#define KW_TWSI_BASE (KW_REGISTER(0x11000))
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020026#define KW_UART0_BASE (KW_REGISTER(0x12000))
Prafulla Wadaskar6761b622009-07-06 15:50:47 +053027#define KW_UART1_BASE (KW_REGISTER(0x12100))
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020028#define KW_MPP_BASE (KW_REGISTER(0x10000))
29#define KW_GPIO0_BASE (KW_REGISTER(0x10100))
30#define KW_GPIO1_BASE (KW_REGISTER(0x10140))
Jason Cooper152bf1f2011-08-04 21:26:16 +053031#define KW_RTC_BASE (KW_REGISTER(0x10300))
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020032#define KW_NANDF_BASE (KW_REGISTER(0x10418))
33#define KW_SPI_BASE (KW_REGISTER(0x10600))
34#define KW_CPU_WIN_BASE (KW_REGISTER(0x20000))
35#define KW_CPU_REG_BASE (KW_REGISTER(0x20100))
36#define KW_TIMER_BASE (KW_REGISTER(0x20300))
37#define KW_REG_PCIE_BASE (KW_REGISTER(0x40000))
Prafulla Wadaskarecb1b022009-06-29 20:55:54 +053038#define KW_USB20_BASE (KW_REGISTER(0x50000))
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020039#define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
40#define KW_EGIGA1_BASE (KW_REGISTER(0x76000))
Prafulla Wadaskar9b81e642010-08-07 17:29:44 +053041#define KW_SATA_BASE (KW_REGISTER(0x80000))
42
43/* Kirkwood Sata controller has two ports */
44#define KW_SATA_PORT0_OFFSET 0x2000
45#define KW_SATA_PORT1_OFFSET 0x4000
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020046
Albert Aribaud8a995232010-07-12 22:24:29 +020047/* Kirkwood GbE controller has two ports */
48#define MAX_MVGBE_DEVS 2
49#define MVGBE0_BASE KW_EGIGA0_BASE
50#define MVGBE1_BASE KW_EGIGA1_BASE
Albert Aribaude91d7d32010-07-12 22:24:28 +020051
Albert ARIBAUDc3c76452012-01-15 22:08:39 +000052/* Kirkwood USB Host controller */
53#define MVUSB0_BASE KW_USB20_BASE
54#define MVUSB0_CPU_ATTR_DRAM_CS0 KWCPU_ATTR_DRAM_CS0
55#define MVUSB0_CPU_ATTR_DRAM_CS1 KWCPU_ATTR_DRAM_CS1
56#define MVUSB0_CPU_ATTR_DRAM_CS2 KWCPU_ATTR_DRAM_CS2
57#define MVUSB0_CPU_ATTR_DRAM_CS3 KWCPU_ATTR_DRAM_CS3
58
59/* Kirkwood CPU memory windows */
60#define MVCPU_WIN_CTRL_DATA KWCPU_WIN_CTRL_DATA
61#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
62#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
63
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020064#if defined (CONFIG_KW88F6281)
65#include <asm/arch/kw88f6281.h>
66#elif defined (CONFIG_KW88F6192)
67#include <asm/arch/kw88f6192.h>
68#else
69#error "SOC Name not defined"
70#endif /* CONFIG_KW88F6281 */
71#endif /* CONFIG_FEROCEON_88FR131 */
72#endif /* _ASM_ARCH_KIRKWOOD_H */