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Prafulla Wadaskara09bbe52009-06-20 11:01:53 +02001/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * Header file for the Marvell's Feroceon CPU core.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 */
26
27#ifndef _ASM_ARCH_KIRKWOOD_H
28#define _ASM_ARCH_KIRKWOOD_H
29
30#ifndef __ASSEMBLY__
31#include <asm/types.h>
32#include <asm/io.h>
33#endif /* __ASSEMBLY__ */
34
35#if defined (CONFIG_FEROCEON_88FR131) || defined (CONFIG_SHEEVA_88SV131)
36#include <asm/arch/cpu.h>
37
38/* SOC specific definations */
39#define INTREG_BASE 0xd0000000
40#define KW_REGISTER(x) (KW_REGS_PHY_BASE + x)
41#define KW_OFFSET_REG (INTREG_BASE + 0x20080)
42
43/* undocumented registers */
44#define KW_REG_UNDOC_0x1470 (KW_REGISTER(0x1470))
45#define KW_REG_UNDOC_0x1478 (KW_REGISTER(0x1478))
46
Heiko Schocher60e286b2009-07-16 09:59:10 +020047#define KW_TWSI_BASE (KW_REGISTER(0x11000))
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020048#define KW_UART0_BASE (KW_REGISTER(0x12000))
Prafulla Wadaskar6761b622009-07-06 15:50:47 +053049#define KW_UART1_BASE (KW_REGISTER(0x12100))
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020050#define KW_MPP_BASE (KW_REGISTER(0x10000))
51#define KW_GPIO0_BASE (KW_REGISTER(0x10100))
52#define KW_GPIO1_BASE (KW_REGISTER(0x10140))
Jason Cooper152bf1f2011-08-04 21:26:16 +053053#define KW_RTC_BASE (KW_REGISTER(0x10300))
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020054#define KW_NANDF_BASE (KW_REGISTER(0x10418))
55#define KW_SPI_BASE (KW_REGISTER(0x10600))
56#define KW_CPU_WIN_BASE (KW_REGISTER(0x20000))
57#define KW_CPU_REG_BASE (KW_REGISTER(0x20100))
58#define KW_TIMER_BASE (KW_REGISTER(0x20300))
59#define KW_REG_PCIE_BASE (KW_REGISTER(0x40000))
Prafulla Wadaskarecb1b022009-06-29 20:55:54 +053060#define KW_USB20_BASE (KW_REGISTER(0x50000))
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020061#define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
62#define KW_EGIGA1_BASE (KW_REGISTER(0x76000))
Prafulla Wadaskar9b81e642010-08-07 17:29:44 +053063#define KW_SATA_BASE (KW_REGISTER(0x80000))
64
65/* Kirkwood Sata controller has two ports */
66#define KW_SATA_PORT0_OFFSET 0x2000
67#define KW_SATA_PORT1_OFFSET 0x4000
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020068
Albert Aribaud8a995232010-07-12 22:24:29 +020069/* Kirkwood GbE controller has two ports */
70#define MAX_MVGBE_DEVS 2
71#define MVGBE0_BASE KW_EGIGA0_BASE
72#define MVGBE1_BASE KW_EGIGA1_BASE
Albert Aribaude91d7d32010-07-12 22:24:28 +020073
Prafulla Wadaskara09bbe52009-06-20 11:01:53 +020074#if defined (CONFIG_KW88F6281)
75#include <asm/arch/kw88f6281.h>
76#elif defined (CONFIG_KW88F6192)
77#include <asm/arch/kw88f6192.h>
78#else
79#error "SOC Name not defined"
80#endif /* CONFIG_KW88F6281 */
81#endif /* CONFIG_FEROCEON_88FR131 */
82#endif /* _ASM_ARCH_KIRKWOOD_H */