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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChungLiew99b037a2008-01-14 17:43:33 -06002/*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wang8bce3ec2012-03-26 21:49:03 +00006 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew99b037a2008-01-14 17:43:33 -06007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiew99b037a2008-01-14 17:43:33 -06008 */
9
10#include <common.h>
11#include <asm/immap.h>
Alison Wang8bce3ec2012-03-26 21:49:03 +000012#include <asm/io.h>
TsiChungLiew99b037a2008-01-14 17:43:33 -060013
14DECLARE_GLOBAL_DATA_PTR;
15
16int checkboard(void)
17{
18 puts("Board: ");
19 puts("Freescale M52277 EVB\n");
20 return 0;
21};
22
Simon Glassd35f3382017-04-06 12:47:05 -060023int dram_init(void)
TsiChungLiew99b037a2008-01-14 17:43:33 -060024{
TsiChung Liew39966e32008-10-21 15:37:02 +000025 u32 dramsize;
26
27#ifdef CONFIG_CF_SBF
28 /*
29 * Serial Boot: The dram is already initialized in start.S
30 * only require to return DRAM size
31 */
32 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
33#else
Alison Wang8bce3ec2012-03-26 21:49:03 +000034 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
35 gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
TsiChung Liew39966e32008-10-21 15:37:02 +000036 u32 i;
TsiChungLiew99b037a2008-01-14 17:43:33 -060037
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020038 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
TsiChungLiew99b037a2008-01-14 17:43:33 -060039
40 for (i = 0x13; i < 0x20; i++) {
41 if (dramsize == (1 << i))
42 break;
43 }
44 i--;
45
Alison Wang8bce3ec2012-03-26 21:49:03 +000046 out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
TsiChung Liew39966e32008-10-21 15:37:02 +000047
Alison Wang8bce3ec2012-03-26 21:49:03 +000048 out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
TsiChungLiew99b037a2008-01-14 17:43:33 -060049
Alison Wang8bce3ec2012-03-26 21:49:03 +000050 out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
51 out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
TsiChungLiew99b037a2008-01-14 17:43:33 -060052
53 /* Issue PALL */
Alison Wang8bce3ec2012-03-26 21:49:03 +000054 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew39966e32008-10-21 15:37:02 +000055 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060056
57 /* Issue LEMR */
Alison Wang8bce3ec2012-03-26 21:49:03 +000058 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
TsiChung Liew39966e32008-10-21 15:37:02 +000059 __asm__("nop");
Alison Wang8bce3ec2012-03-26 21:49:03 +000060 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD);
TsiChung Liew39966e32008-10-21 15:37:02 +000061 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060062
63 udelay(1000);
64
65 /* Issue PALL */
Alison Wang8bce3ec2012-03-26 21:49:03 +000066 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew39966e32008-10-21 15:37:02 +000067 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060068
69 /* Perform two refresh cycles */
Alison Wang8bce3ec2012-03-26 21:49:03 +000070 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew39966e32008-10-21 15:37:02 +000071 __asm__("nop");
Alison Wang8bce3ec2012-03-26 21:49:03 +000072 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew39966e32008-10-21 15:37:02 +000073 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060074
Alison Wang8bce3ec2012-03-26 21:49:03 +000075 out_be32(&sdram->sdcr,
76 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
TsiChungLiew99b037a2008-01-14 17:43:33 -060077
78 udelay(100);
TsiChung Liew39966e32008-10-21 15:37:02 +000079#endif
Simon Glass39f90ba2017-03-31 08:40:25 -060080 gd->ram_size = dramsize;
81
82 return 0;
TsiChungLiew99b037a2008-01-14 17:43:33 -060083};
84
85int testdram(void)
86{
87 /* TODO: XXX XXX XXX */
88 printf("DRAM test not implemented!\n");
89
90 return (0);
91}