blob: 0c77f95159369f9dcf2851970ec99da3e764ad14 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ben Warren7efe9272008-01-16 22:37:35 -05002/*
3 * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
Stefan Roese88fbf932010-04-15 16:07:28 +02004 * With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers
Ben Warren7efe9272008-01-16 22:37:35 -05005 */
6
7#include <common.h>
Ben Warren37531402008-01-26 23:41:19 -05008
Haavard Skinnemoend74084a2008-05-16 11:10:31 +02009#include <malloc.h>
Ben Warren7efe9272008-01-16 22:37:35 -050010#include <spi.h>
11#include <asm/mpc8xxx_spi.h>
12
Kim Phillipsb8e25202008-01-17 12:48:00 -060013#define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */
14#define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */
Ben Warren7efe9272008-01-16 22:37:35 -050015
Kim Phillipsb8e25202008-01-17 12:48:00 -060016#define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */
17#define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */
18#define SPI_MODE_MS (0x80000000 >> 6) /* Always master */
19#define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */
Ben Warren7efe9272008-01-16 22:37:35 -050020
21#define SPI_TIMEOUT 1000
22
Mario Six4f4936e2019-04-29 01:58:36 +053023struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
Haavard Skinnemoend74084a2008-05-16 11:10:31 +020024{
25 struct spi_slave *slave;
26
27 if (!spi_cs_is_valid(bus, cs))
28 return NULL;
29
Simon Glassd034a952013-03-18 19:23:40 +000030 slave = spi_alloc_slave_base(bus, cs);
Haavard Skinnemoend74084a2008-05-16 11:10:31 +020031 if (!slave)
32 return NULL;
33
Haavard Skinnemoend74084a2008-05-16 11:10:31 +020034 /*
35 * TODO: Some of the code in spi_init() should probably move
36 * here, or into spi_claim_bus() below.
37 */
38
39 return slave;
40}
41
42void spi_free_slave(struct spi_slave *slave)
43{
44 free(slave);
45}
46
Ben Warren7efe9272008-01-16 22:37:35 -050047void spi_init(void)
48{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020049 volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
Ben Warren7efe9272008-01-16 22:37:35 -050050
Kim Phillipsb8e25202008-01-17 12:48:00 -060051 /*
Ben Warren7efe9272008-01-16 22:37:35 -050052 * SPI pins on the MPC83xx are not muxed, so all we do is initialize
53 * some registers
Kim Phillipsb8e25202008-01-17 12:48:00 -060054 */
Ben Warren7efe9272008-01-16 22:37:35 -050055 spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
Jagan Tekif9c9f6a2015-10-23 01:38:07 +053056 spi->mode = (spi->mode & 0xfff0ffff) | BIT(16); /* Use SYSCLK / 8
Kim Phillipsb8e25202008-01-17 12:48:00 -060057 (16.67MHz typ.) */
Ben Warren7efe9272008-01-16 22:37:35 -050058 spi->event = 0xffffffff; /* Clear all SPI events */
59 spi->mask = 0x00000000; /* Mask all SPI interrupts */
60 spi->com = 0; /* LST bit doesn't do anything, so disregard */
61}
62
Haavard Skinnemoend74084a2008-05-16 11:10:31 +020063int spi_claim_bus(struct spi_slave *slave)
64{
65 return 0;
66}
67
68void spi_release_bus(struct spi_slave *slave)
69{
Haavard Skinnemoend74084a2008-05-16 11:10:31 +020070}
71
Mario Six4f4936e2019-04-29 01:58:36 +053072int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
73 ulong flags)
Ben Warren7efe9272008-01-16 22:37:35 -050074{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020075 volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
Mario Six4f4936e2019-04-29 01:58:36 +053076 uint tmpdout, tmpdin, event;
Axel Lin3db39282013-07-12 17:42:15 +080077 int numBlks = DIV_ROUND_UP(bitlen, 32);
Ben Warren7efe9272008-01-16 22:37:35 -050078 int tm, isRead = 0;
Mario Six4f4936e2019-04-29 01:58:36 +053079 uchar charSize = 32;
Ben Warren7efe9272008-01-16 22:37:35 -050080
Haavard Skinnemoend74084a2008-05-16 11:10:31 +020081 debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
82 slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
Ben Warren7efe9272008-01-16 22:37:35 -050083
Haavard Skinnemoend74084a2008-05-16 11:10:31 +020084 if (flags & SPI_XFER_BEGIN)
85 spi_cs_activate(slave);
Ben Warren7efe9272008-01-16 22:37:35 -050086
87 spi->event = 0xffffffff; /* Clear all SPI events */
88
89 /* handle data in 32-bit chunks */
90 while (numBlks--) {
91 tmpdout = 0;
92 charSize = (bitlen >= 32 ? 32 : bitlen);
93
94 /* Shift data so it's msb-justified */
95 tmpdout = *(u32 *) dout >> (32 - charSize);
96
97 /* The LEN field of the SPMODE register is set as follows:
98 *
Kim Phillipsb8e25202008-01-17 12:48:00 -060099 * Bit length setting
100 * len <= 4 3
101 * 4 < len <= 16 len - 1
102 * len > 16 0
Ben Warren7efe9272008-01-16 22:37:35 -0500103 */
104
Ira W. Snyder5261b002012-09-12 14:17:31 -0700105 spi->mode &= ~SPI_MODE_EN;
106
Kim Phillipsb8e25202008-01-17 12:48:00 -0600107 if (bitlen <= 16) {
108 if (bitlen <= 4)
109 spi->mode = (spi->mode & 0xff0fffff) |
Wolfgang Denkec7fbf52013-10-04 17:43:24 +0200110 (3 << 20);
Kim Phillipsb8e25202008-01-17 12:48:00 -0600111 else
112 spi->mode = (spi->mode & 0xff0fffff) |
Wolfgang Denkec7fbf52013-10-04 17:43:24 +0200113 ((bitlen - 1) << 20);
Kim Phillipsb8e25202008-01-17 12:48:00 -0600114 } else {
115 spi->mode = (spi->mode & 0xff0fffff);
Ben Warren7efe9272008-01-16 22:37:35 -0500116 /* Set up the next iteration if sending > 32 bits */
117 bitlen -= 32;
118 dout += 4;
119 }
120
Ira W. Snyder5261b002012-09-12 14:17:31 -0700121 spi->mode |= SPI_MODE_EN;
122
Ben Warren7efe9272008-01-16 22:37:35 -0500123 spi->tx = tmpdout; /* Write the data out */
124 debug("*** spi_xfer: ... %08x written\n", tmpdout);
125
Kim Phillipsb8e25202008-01-17 12:48:00 -0600126 /*
Ben Warren7efe9272008-01-16 22:37:35 -0500127 * Wait for SPI transmit to get out
128 * or time out (1 second = 1000 ms)
129 * The NE event must be read and cleared first
Kim Phillipsb8e25202008-01-17 12:48:00 -0600130 */
Ben Warren7efe9272008-01-16 22:37:35 -0500131 for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) {
132 event = spi->event;
133 if (event & SPI_EV_NE) {
134 tmpdin = spi->rx;
135 spi->event |= SPI_EV_NE;
136 isRead = 1;
137
138 *(u32 *) din = (tmpdin << (32 - charSize));
139 if (charSize == 32) {
140 /* Advance output buffer by 32 bits */
141 din += 4;
142 }
143 }
Kim Phillipsb8e25202008-01-17 12:48:00 -0600144 /*
145 * Only bail when we've had both NE and NF events.
Ben Warren7efe9272008-01-16 22:37:35 -0500146 * This will cause timeouts on RO devices, so maybe
147 * in the future put an arbitrary delay after writing
Kim Phillipsb8e25202008-01-17 12:48:00 -0600148 * the device. Arbitrary delays suck, though...
149 */
Ben Warren7efe9272008-01-16 22:37:35 -0500150 if (isRead && (event & SPI_EV_NF))
151 break;
152 }
153 if (tm >= SPI_TIMEOUT)
154 puts("*** spi_xfer: Time out during SPI transfer");
155
156 debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
157 }
158
Haavard Skinnemoend74084a2008-05-16 11:10:31 +0200159 if (flags & SPI_XFER_END)
160 spi_cs_deactivate(slave);
Kim Phillipsb8e25202008-01-17 12:48:00 -0600161
Ben Warren7efe9272008-01-16 22:37:35 -0500162 return 0;
163}