Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc. |
| 3 | * With help from the common/soft_spi and cpu/mpc8260 drivers |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <spi.h> |
| 26 | #include <asm/mpc8xxx_spi.h> |
| 27 | |
| 28 | #ifdef CONFIG_HARD_SPI |
| 29 | |
| 30 | #define SPI_EV_NE 0x80000000 >> 22 /* Receiver Not Empty */ |
| 31 | #define SPI_EV_NF 0x80000000 >> 23 /* Transmitter Not Full */ |
| 32 | |
| 33 | #define SPI_MODE_LOOP 0x80000000 >> 1 /* Loopback mode */ |
| 34 | #define SPI_MODE_REV 0x80000000 >> 5 /* Reverse mode - MSB first */ |
| 35 | #define SPI_MODE_MS 0x80000000 >> 6 /* Always master */ |
| 36 | #define SPI_MODE_EN 0x80000000 >> 7 /* Enable interface */ |
| 37 | |
| 38 | #define SPI_PRESCALER(reg, div) (reg)=((reg) & 0xfff0ffff) | ((div)<<16) |
| 39 | #define SPI_CHARLENGTH(reg, div) (reg)=((reg) & 0xff0fffff) | ((div)<<20) |
| 40 | |
| 41 | #define SPI_TIMEOUT 1000 |
| 42 | |
| 43 | void spi_init(void) |
| 44 | { |
| 45 | volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; |
| 46 | |
| 47 | /* ------------------------------------------------ |
| 48 | * SPI pins on the MPC83xx are not muxed, so all we do is initialize |
| 49 | * some registers |
| 50 | * ------------------------------------------------ */ |
| 51 | spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; |
| 52 | SPI_PRESCALER(spi->mode, 1); /* Use SYSCLK / 8 (16.67MHz typ.) */ |
| 53 | spi->event = 0xffffffff; /* Clear all SPI events */ |
| 54 | spi->mask = 0x00000000; /* Mask all SPI interrupts */ |
| 55 | spi->com = 0; /* LST bit doesn't do anything, so disregard */ |
| 56 | } |
| 57 | |
| 58 | int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) |
| 59 | { |
| 60 | volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; |
| 61 | unsigned int tmpdout, tmpdin, event; |
| 62 | int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0); |
| 63 | int tm, isRead = 0; |
| 64 | unsigned char charSize = 32; |
| 65 | |
| 66 | debug("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", |
| 67 | (int)chipsel, *(uint *) dout, *(uint *) din, bitlen); |
| 68 | |
| 69 | if (chipsel != NULL) |
| 70 | (*chipsel) (1); /* select the target chip */ |
| 71 | |
| 72 | spi->event = 0xffffffff; /* Clear all SPI events */ |
| 73 | |
| 74 | /* handle data in 32-bit chunks */ |
| 75 | while (numBlks--) { |
| 76 | tmpdout = 0; |
| 77 | charSize = (bitlen >= 32 ? 32 : bitlen); |
| 78 | |
| 79 | /* Shift data so it's msb-justified */ |
| 80 | tmpdout = *(u32 *) dout >> (32 - charSize); |
| 81 | |
| 82 | /* The LEN field of the SPMODE register is set as follows: |
| 83 | * |
| 84 | * Bit length setting |
| 85 | * l <= 4 3 |
| 86 | * 4 < l <= 16 l - 1 |
| 87 | * l > 16 0 |
| 88 | */ |
| 89 | |
| 90 | if (bitlen <= 16) |
| 91 | SPI_CHARLENGTH(spi->mode, bitlen <= 4 ? 3 : bitlen - 1); |
| 92 | else { |
| 93 | SPI_CHARLENGTH(spi->mode, 0); |
| 94 | /* Set up the next iteration if sending > 32 bits */ |
| 95 | bitlen -= 32; |
| 96 | dout += 4; |
| 97 | } |
| 98 | |
| 99 | spi->tx = tmpdout; /* Write the data out */ |
| 100 | debug("*** spi_xfer: ... %08x written\n", tmpdout); |
| 101 | |
| 102 | /* -------------------------------- |
| 103 | * Wait for SPI transmit to get out |
| 104 | * or time out (1 second = 1000 ms) |
| 105 | * The NE event must be read and cleared first |
| 106 | * -------------------------------- */ |
| 107 | for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) { |
| 108 | event = spi->event; |
| 109 | if (event & SPI_EV_NE) { |
| 110 | tmpdin = spi->rx; |
| 111 | spi->event |= SPI_EV_NE; |
| 112 | isRead = 1; |
| 113 | |
| 114 | *(u32 *) din = (tmpdin << (32 - charSize)); |
| 115 | if (charSize == 32) { |
| 116 | /* Advance output buffer by 32 bits */ |
| 117 | din += 4; |
| 118 | } |
| 119 | } |
| 120 | /* Only bail when we've had both NE and NF events. |
| 121 | * This will cause timeouts on RO devices, so maybe |
| 122 | * in the future put an arbitrary delay after writing |
| 123 | * the device. Arbitrary delays suck, though... */ |
| 124 | if (isRead && (event & SPI_EV_NF)) |
| 125 | break; |
| 126 | } |
| 127 | if (tm >= SPI_TIMEOUT) |
| 128 | puts("*** spi_xfer: Time out during SPI transfer"); |
| 129 | |
| 130 | debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin); |
| 131 | } |
| 132 | |
| 133 | if (chipsel != NULL) |
| 134 | (*chipsel) (0); /* deselect the target chip */ |
| 135 | return 0; |
| 136 | } |
| 137 | |
| 138 | #endif /* CONFIG_HARD_SPI */ |