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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -06002/*
3 * Configuation settings for the Motorola MC5275EVB board.
4 *
5 * By Arthur Shipkowski <art@videon-central.com>
6 * Copyright (C) 2005 Videon Central, Inc.
7 *
8 * Based off of M5272C3 board code by Josef Baumgartner
9 * <josef.baumgartner@telex.de>
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060010 */
11
12/*
13 * board/config.h - configuration options, board specific
14 */
15
16#ifndef _M5275EVB_H
17#define _M5275EVB_H
18
19/*
20 * High Level Configuration Options
21 * (easy to change)
22 */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060023
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020024#define CONFIG_SYS_UART_PORT (0)
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060025
26/* Configuration for environment
27 * Environment is embedded in u-boot in the second sector of the flash
28 */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060029
angelo@sysam.it6312a952015-03-29 22:54:16 +020030#define LDS_BOARD_TEXT \
Simon Glass547cb402017-08-03 12:21:49 -060031 . = DEFINED(env_offset) ? env_offset : .; \
32 env/embedded.o(.text);
angelo@sysam.it6312a952015-03-29 22:54:16 +020033
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060034/* Available command configuration */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060035
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060036/* I2C */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020037#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
38#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
39#define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060040
TsiChung Liew23cc28c2010-03-10 16:33:03 -060041#ifdef CONFIG_MCFFEC
TsiChung Liew23cc28c2010-03-10 16:33:03 -060042# define CONFIG_OVERWRITE_ETHADDR_ONCE
43#endif /* FEC_ENET */
44
45#define CONFIG_EXTRA_ENV_SETTINGS \
46 "netdev=eth0\0" \
47 "loadaddr=10000\0" \
48 "uboot=u-boot.bin\0" \
49 "load=tftp ${loadaddr} ${uboot}\0" \
50 "upd=run load; run prog\0" \
51 "prog=prot off ffe00000 ffe3ffff;" \
52 "era ffe00000 ffe3ffff;" \
53 "cp.b ${loadaddr} ffe00000 ${filesize};"\
54 "save\0" \
55 ""
56
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020057#define CONFIG_SYS_CLK 150000000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060058
59/*
60 * Low Level Configuration Settings
61 * (address mappings, register initial values, etc.)
62 * You should know what you are doing if you make changes here.
63 */
64
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020065#define CONFIG_SYS_MBAR 0x40000000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060066
67/*-----------------------------------------------------------------------
68 * Definitions for initial stack pointer and data area (in DPRAM)
69 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020070#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +020071#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060072
73/*-----------------------------------------------------------------------
74 * Start addresses for the final memory configuration
75 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020076 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060077 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020078#define CONFIG_SYS_SDRAM_BASE 0x00000000
79#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
TsiChung Liew7f1a0462008-10-21 10:03:07 +000080#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060081
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020082#define CONFIG_SYS_MONITOR_LEN 0x20000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060083
84/*
85 * For booting Linux, the board info and command line data
86 * have to be in the first 8 MB of memory, since this is
87 * the maximum mapped by the Linux kernel during initialization ??
88 */
TsiChung Liew25a00632009-01-27 12:57:47 +000089#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060090
91/*-----------------------------------------------------------------------
92 * FLASH organization
93 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020094#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
95#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060096
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020097#define CONFIG_SYS_FLASH_SIZE 0x200000
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -060098
99/*-----------------------------------------------------------------------
100 * Cache Configuration
101 */
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600102
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600103#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200104 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600105#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200106 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600107#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
108#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
109 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
110 CF_ACR_EN | CF_ACR_SM_ALL)
111#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
112 CF_CACR_DISD | CF_CACR_INVI | \
113 CF_CACR_CEIB | CF_CACR_DCM | \
114 CF_CACR_EUSP)
115
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600116/*-----------------------------------------------------------------------
117 * Memory bank definitions
118 */
TsiChung Liew7f1a0462008-10-21 10:03:07 +0000119#define CONFIG_SYS_CS0_BASE 0xffe00000
120#define CONFIG_SYS_CS0_CTRL 0x00001980
121#define CONFIG_SYS_CS0_MASK 0x001F0001
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600122
TsiChung Liew7f1a0462008-10-21 10:03:07 +0000123#define CONFIG_SYS_CS1_BASE 0x30000000
124#define CONFIG_SYS_CS1_CTRL 0x00001900
125#define CONFIG_SYS_CS1_MASK 0x00070001
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600126
127/*-----------------------------------------------------------------------
128 * Port configuration
129 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200130#define CONFIG_SYS_FECI2C 0x0FA0
Matthew Fettke9f3b3bb2008-01-24 14:02:32 -0600131
132#endif /* _M5275EVB_H */