Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
maxims@google.com | 899b40f | 2017-01-18 13:44:57 -0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2016 Google, Inc |
maxims@google.com | 899b40f | 2017-01-18 13:44:57 -0800 | [diff] [blame] | 4 | */ |
| 5 | #include <common.h> |
| 6 | #include <dm.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 7 | #include <init.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 8 | #include <log.h> |
maxims@google.com | 899b40f | 2017-01-18 13:44:57 -0800 | [diff] [blame] | 9 | #include <ram.h> |
| 10 | #include <timer.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 11 | #include <asm/global_data.h> |
maxims@google.com | 899b40f | 2017-01-18 13:44:57 -0800 | [diff] [blame] | 12 | #include <asm/io.h> |
| 13 | #include <asm/arch/timer.h> |
| 14 | #include <asm/arch/wdt.h> |
| 15 | #include <linux/err.h> |
| 16 | #include <dm/uclass.h> |
| 17 | |
| 18 | /* |
| 19 | * Second Watchdog Timer by default is configured |
| 20 | * to trigger secondary boot source. |
| 21 | */ |
| 22 | #define AST_2ND_BOOT_WDT 1 |
| 23 | |
| 24 | /* |
| 25 | * Third Watchdog Timer by default is configured |
| 26 | * to toggle Flash address mode switch before reset. |
| 27 | */ |
| 28 | #define AST_FLASH_ADDR_DETECT_WDT 2 |
| 29 | |
| 30 | DECLARE_GLOBAL_DATA_PTR; |
| 31 | |
maxims@google.com | 899b40f | 2017-01-18 13:44:57 -0800 | [diff] [blame] | 32 | int board_init(void) |
| 33 | { |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 34 | gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; |
maxims@google.com | 899b40f | 2017-01-18 13:44:57 -0800 | [diff] [blame] | 35 | |
| 36 | return 0; |
| 37 | } |
| 38 | |
| 39 | int dram_init(void) |
| 40 | { |
| 41 | struct udevice *dev; |
| 42 | struct ram_info ram; |
| 43 | int ret; |
| 44 | |
| 45 | ret = uclass_get_device(UCLASS_RAM, 0, &dev); |
| 46 | if (ret) { |
| 47 | debug("DRAM FAIL1\r\n"); |
| 48 | return ret; |
| 49 | } |
| 50 | |
| 51 | ret = ram_get_info(dev, &ram); |
| 52 | if (ret) { |
| 53 | debug("DRAM FAIL2\r\n"); |
| 54 | return ret; |
| 55 | } |
| 56 | |
| 57 | gd->ram_size = ram.size; |
| 58 | |
| 59 | return 0; |
| 60 | } |