Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 1 | CONFIG_ARM=y |
Tom Rini | e1e8544 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 3 | CONFIG_ARCH_ROCKCHIP=y |
| 4 | CONFIG_SYS_TEXT_BASE=0x00200000 |
Simon Glass | 035939e | 2021-07-10 21:14:30 -0600 | [diff] [blame] | 5 | CONFIG_SPL_GPIO=y |
Tom Rini | 2e262c4 | 2020-08-10 15:31:07 -0400 | [diff] [blame] | 6 | CONFIG_NR_DRAM_BANKS=1 |
Jagan Teki | 252c2a3 | 2020-07-07 19:20:49 +0530 | [diff] [blame] | 7 | CONFIG_ENV_SIZE=0x8000 |
| 8 | CONFIG_ENV_OFFSET=0x3F8000 |
Jagan Teki | b3e1086 | 2020-06-04 20:21:39 +0530 | [diff] [blame] | 9 | CONFIG_ENV_SECT_SIZE=0x1000 |
Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 10 | CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine" |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 11 | CONFIG_ROCKCHIP_RK3399=y |
| 12 | CONFIG_TARGET_ROC_PC_RK3399=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 13 | CONFIG_DEBUG_UART_BASE=0xFF1A0000 |
| 14 | CONFIG_DEBUG_UART_CLOCK=24000000 |
Jagan Teki | 5d00e00 | 2020-06-04 20:21:40 +0530 | [diff] [blame] | 15 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
Simon Glass | a582047 | 2021-08-08 12:20:14 -0600 | [diff] [blame] | 16 | CONFIG_SPL_SPI=y |
Tom Rini | 0997ee0 | 2021-08-23 10:25:31 -0400 | [diff] [blame] | 17 | CONFIG_SYS_LOAD_ADDR=0x800800 |
Tom Rini | 4b2fcb3 | 2022-04-08 13:36:51 -0400 | [diff] [blame^] | 18 | CONFIG_DEBUG_UART=y |
Jagan Teki | 4d45982 | 2020-07-07 19:20:48 +0530 | [diff] [blame] | 19 | # CONFIG_ANDROID_BOOT_IMAGE is not set |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 20 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" |
| 21 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 22 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 23 | CONFIG_SPL_STACK_R=y |
Jagan Teki | 5969196 | 2020-07-21 20:36:04 +0530 | [diff] [blame] | 24 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 |
| 25 | CONFIG_SPL_ENV_SUPPORT=y |
Jagan Teki | 5d00e00 | 2020-06-04 20:21:40 +0530 | [diff] [blame] | 26 | CONFIG_SPL_SPI_LOAD=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 27 | CONFIG_TPL=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 28 | CONFIG_CMD_BOOTZ=y |
| 29 | CONFIG_CMD_GPT=y |
| 30 | CONFIG_CMD_MMC=y |
Jagan Teki | 77c31a8 | 2020-05-09 22:26:23 +0530 | [diff] [blame] | 31 | CONFIG_CMD_PCI=y |
Tom Rini | 63683ef | 2020-05-26 08:32:25 -0400 | [diff] [blame] | 32 | CONFIG_CMD_USB=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 33 | # CONFIG_CMD_SETEXPR is not set |
| 34 | CONFIG_CMD_TIME=y |
| 35 | CONFIG_SPL_OF_CONTROL=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 36 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
Jagan Teki | b3e1086 | 2020-06-04 20:21:39 +0530 | [diff] [blame] | 37 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 38 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
Jagan Teki | 5969196 | 2020-07-21 20:36:04 +0530 | [diff] [blame] | 39 | CONFIG_SPL_DM_SEQ_ALIAS=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 40 | CONFIG_ROCKCHIP_GPIO=y |
| 41 | CONFIG_SYS_I2C_ROCKCHIP=y |
Jagan Teki | be6bbd2 | 2020-05-26 11:35:16 +0800 | [diff] [blame] | 42 | CONFIG_MISC=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 43 | CONFIG_MMC_DW=y |
| 44 | CONFIG_MMC_DW_ROCKCHIP=y |
| 45 | CONFIG_MMC_SDHCI=y |
| 46 | CONFIG_MMC_SDHCI_ROCKCHIP=y |
Hugh Cole-Baker | 43f162d | 2020-11-22 13:03:45 +0000 | [diff] [blame] | 47 | CONFIG_SF_DEFAULT_BUS=1 |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 48 | CONFIG_SPI_FLASH_WINBOND=y |
| 49 | CONFIG_DM_ETH=y |
| 50 | CONFIG_ETH_DESIGNWARE=y |
| 51 | CONFIG_GMAC_ROCKCHIP=y |
Mark Kettenis | f8463d6 | 2022-01-22 20:38:11 +0100 | [diff] [blame] | 52 | CONFIG_NVME_PCI=y |
Jagan Teki | 77c31a8 | 2020-05-09 22:26:23 +0530 | [diff] [blame] | 53 | CONFIG_PCI=y |
Jagan Teki | be6bbd2 | 2020-05-26 11:35:16 +0800 | [diff] [blame] | 54 | CONFIG_PHY_ROCKCHIP_INNO_USB2=y |
| 55 | CONFIG_PHY_ROCKCHIP_TYPEC=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 56 | CONFIG_PMIC_RK8XX=y |
| 57 | CONFIG_REGULATOR_PWM=y |
| 58 | CONFIG_REGULATOR_RK8XX=y |
| 59 | CONFIG_PWM_ROCKCHIP=y |
Jagan Teki | 0c7933d | 2020-07-14 01:36:35 +0530 | [diff] [blame] | 60 | # CONFIG_RAM_ROCKCHIP_DEBUG is not set |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 61 | CONFIG_RAM_RK3399_LPDDR4=y |
Jagan Teki | 77c31a8 | 2020-05-09 22:26:23 +0530 | [diff] [blame] | 62 | CONFIG_DM_RESET=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 63 | CONFIG_BAUDRATE=1500000 |
| 64 | CONFIG_DEBUG_UART_SHIFT=2 |
| 65 | CONFIG_ROCKCHIP_SPI=y |
| 66 | CONFIG_SYSRESET=y |
| 67 | CONFIG_USB=y |
| 68 | CONFIG_USB_XHCI_HCD=y |
| 69 | CONFIG_USB_XHCI_DWC3=y |
| 70 | CONFIG_USB_EHCI_HCD=y |
| 71 | CONFIG_USB_EHCI_GENERIC=y |
Jagan Teki | be6bbd2 | 2020-05-26 11:35:16 +0800 | [diff] [blame] | 72 | CONFIG_USB_DWC3=y |
| 73 | CONFIG_USB_DWC3_GENERIC=y |
Tom Rini | 3eea577 | 2020-05-08 09:08:39 -0400 | [diff] [blame] | 74 | CONFIG_USB_KEYBOARD=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 75 | CONFIG_USB_HOST_ETHER=y |
| 76 | CONFIG_USB_ETHER_ASIX=y |
| 77 | CONFIG_USB_ETHER_ASIX88179=y |
| 78 | CONFIG_USB_ETHER_MCS7830=y |
| 79 | CONFIG_USB_ETHER_RTL8152=y |
| 80 | CONFIG_USB_ETHER_SMSC95XX=y |
Tom Rini | 2c082ab | 2021-07-26 21:10:37 -0400 | [diff] [blame] | 81 | CONFIG_USB_GADGET=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 82 | CONFIG_DM_VIDEO=y |
Suniel Mahesh | 529d52f | 2020-04-28 15:30:19 +0530 | [diff] [blame] | 83 | CONFIG_DISPLAY=y |
| 84 | CONFIG_VIDEO_ROCKCHIP=y |
| 85 | CONFIG_DISPLAY_ROCKCHIP_HDMI=y |
Tom Rini | 3eea577 | 2020-05-08 09:08:39 -0400 | [diff] [blame] | 86 | CONFIG_SPL_TINY_MEMSET=y |
| 87 | CONFIG_ERRNO_STR=y |