| commit | 43f162d03c7dd15fdaed697574ab984cb0348952 | [log] [tgz] |
|---|---|---|
| author | Hugh Cole-Baker <sigmaris@gmail.com> | Sun Nov 22 13:03:45 2020 +0000 |
| committer | Kever Yang <kever.yang@rock-chips.com> | Thu Jan 21 11:53:25 2021 +0800 |
| tree | b582198697c5235c56b4f1c32646ef12d26636ef | |
| parent | a2f886e7be63020d44bcedb027d61c768e02637f [diff] |
rockchip: rk3399-roc-pc: default to SPI bus 1 for SPI-flash
SPI flash on this board is located on bus 1, default to using bus 1 for
SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to
bus 0.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>