Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 4acf60637cc953d16819786612e552df18fe112b / . / arch / arm / dts / sun50i-h616-orangepi-zero2.dts
blob: b5d713926a341a291d1eb4e649b7984cd8ebc9e4 [file] [log] [blame]
Andre Przywara8780ada2023-10-19 15:51:39 +0100[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]2/*
3 * Copyright (C) 2020 Arm Ltd.
4 */
5
6/dts-v1/;
7
Andre Przywara8780ada2023-10-19 15:51:39 +0100[diff] [blame]8#include "sun50i-h616-orangepi-zero.dtsi"
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]9
10/ {
11 model = "OrangePi Zero2";
12 compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]13};
14
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]15&emac0 {
Chukun Pancedb1252023-10-29 15:40:09 +0800[diff] [blame]16 allwinner,rx-delay-ps = <3100>;
17 allwinner,tx-delay-ps = <700>;
18 phy-mode = "rgmii";
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]19 phy-supply = <&reg_dcdce>;
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]20};
21
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]22&mmc0 {
23 vmmc-supply = <&reg_dcdce>;
Andre Przywaraed2724b2023-01-12 11:22:20 +0000[diff] [blame]24};
25
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]26&r_rsb {
27 status = "okay";
28
29 axp305: pmic@745 {
30 compatible = "x-powers,axp305", "x-powers,axp805",
31 "x-powers,axp806";
32 interrupt-controller;
33 #interrupt-cells = <1>;
34 reg = <0x745>;
35
36 x-powers,self-working-mode;
37 vina-supply = <&reg_vcc5v>;
38 vinb-supply = <&reg_vcc5v>;
39 vinc-supply = <&reg_vcc5v>;
40 vind-supply = <&reg_vcc5v>;
41 vine-supply = <&reg_vcc5v>;
42 aldoin-supply = <&reg_vcc5v>;
43 bldoin-supply = <&reg_vcc5v>;
44 cldoin-supply = <&reg_vcc5v>;
45
46 regulators {
47 reg_aldo1: aldo1 {
48 regulator-always-on;
49 regulator-min-microvolt = <3300000>;
50 regulator-max-microvolt = <3300000>;
51 regulator-name = "vcc-sys";
52 };
53
54 reg_aldo2: aldo2 { /* 3.3V on headers */
55 regulator-always-on;
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
58 regulator-name = "vcc3v3-ext";
59 };
60
61 reg_aldo3: aldo3 { /* 3.3V on headers */
62 regulator-always-on;
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65 regulator-name = "vcc3v3-ext2";
66 };
67
68 reg_bldo1: bldo1 {
69 regulator-always-on;
70 regulator-min-microvolt = <1800000>;
71 regulator-max-microvolt = <1800000>;
72 regulator-name = "vcc1v8";
73 };
74
75 bldo2 {
76 /* unused */
77 };
78
79 bldo3 {
80 /* unused */
81 };
82
83 bldo4 {
84 /* unused */
85 };
86
87 cldo1 {
88 /* reserved */
89 };
90
91 cldo2 {
92 /* unused */
93 };
94
95 cldo3 {
96 /* unused */
97 };
98
99 reg_dcdca: dcdca {
100 regulator-always-on;
101 regulator-min-microvolt = <810000>;
Andre Przywara5eb4bbe2022-09-11 00:04:41 +0100[diff] [blame]102 regulator-max-microvolt = <1100000>;
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]103 regulator-name = "vdd-cpu";
104 };
105
106 reg_dcdcc: dcdcc {
107 regulator-always-on;
108 regulator-min-microvolt = <810000>;
Andre Przywara5eb4bbe2022-09-11 00:04:41 +0100[diff] [blame]109 regulator-max-microvolt = <990000>;
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]110 regulator-name = "vdd-gpu-sys";
111 };
112
113 reg_dcdcd: dcdcd {
114 regulator-always-on;
115 regulator-min-microvolt = <1500000>;
116 regulator-max-microvolt = <1500000>;
117 regulator-name = "vdd-dram";
118 };
119
120 reg_dcdce: dcdce {
Andre Przywara5eb4bbe2022-09-11 00:04:41 +0100[diff] [blame]121 regulator-always-on;
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]122 regulator-min-microvolt = <3300000>;
123 regulator-max-microvolt = <3300000>;
124 regulator-name = "vcc-eth-mmc";
125 };
126
127 sw {
128 /* unused */
129 };
130 };
131 };
132};
133
Andre Przywara5eb4bbe2022-09-11 00:04:41 +0100[diff] [blame]134&pio {
135 vcc-pc-supply = <&reg_aldo1>;
136 vcc-pf-supply = <&reg_aldo1>;
137 vcc-pg-supply = <&reg_bldo1>;
138 vcc-ph-supply = <&reg_aldo1>;
139 vcc-pi-supply = <&reg_aldo1>;
140};