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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
SARTRE Leodce71762013-06-03 23:30:36 +00002/*
3 *
4 * Congatec Conga-QEVAl board configuration file.
5 *
6 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
7 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
8 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
9 * Leo Sartre, <lsartre@adeneo-embedded.com>
SARTRE Leodce71762013-06-03 23:30:36 +000010 */
11
12#ifndef __CONFIG_CGTQMX6EVAL_H
13#define __CONFIG_CGTQMX6EVAL_H
14
SARTRE Leodce71762013-06-03 23:30:36 +000015#include "mx6_common.h"
16
SARTRE Leodce71762013-06-03 23:30:36 +000017#define CONFIG_MACH_TYPE 4122
18
Otavio Salvadore186b182015-11-19 19:02:36 -020019#ifdef CONFIG_SPL
Otavio Salvadore186b182015-11-19 19:02:36 -020020#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
Otavio Salvadore186b182015-11-19 19:02:36 -020021#include "imx6_spl.h"
22#endif
23
SARTRE Leodce71762013-06-03 23:30:36 +000024/* Size of malloc() pool */
25#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
26
SARTRE Leodce71762013-06-03 23:30:36 +000027#define CONFIG_MISC_INIT_R
SARTRE Leodce71762013-06-03 23:30:36 +000028
29#define CONFIG_MXC_UART
30#define CONFIG_MXC_UART_BASE UART2_BASE
31
32/* MMC Configs */
SARTRE Leodce71762013-06-03 23:30:36 +000033#define CONFIG_SYS_FSL_ESDHC_ADDR 0
34
Otavio Salvadorf594b552015-11-19 19:02:33 -020035/* SPI NOR */
Otavio Salvadorf594b552015-11-19 19:02:33 -020036#define CONFIG_SPI_FLASH
37#define CONFIG_SPI_FLASH_STMICRO
38#define CONFIG_SPI_FLASH_SST
Otavio Salvadorf594b552015-11-19 19:02:33 -020039#define CONFIG_SF_DEFAULT_BUS 0
40#define CONFIG_SF_DEFAULT_SPEED 20000000
41#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
42
Otavio Salvador38881002015-07-23 11:02:27 -030043/* Thermal support */
Adrian Alonsoce08c362015-09-02 13:54:13 -050044#define CONFIG_IMX_THERMAL
Otavio Salvador38881002015-07-23 11:02:27 -030045
Otavio Salvador0378d632015-07-23 11:02:28 -030046/* I2C Configs */
Otavio Salvador0378d632015-07-23 11:02:28 -030047#define CONFIG_SYS_I2C
48#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020049#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
50#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Otavio Salvador0378d632015-07-23 11:02:28 -030051#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
52#define CONFIG_SYS_I2C_SPEED 100000
53
54/* PMIC */
55#define CONFIG_POWER
56#define CONFIG_POWER_I2C
57#define CONFIG_POWER_PFUZE100
58#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
59
Otavio Salvadorc8762d02015-07-23 11:02:29 -030060/* USB Configs */
Otavio Salvadorc8762d02015-07-23 11:02:29 -030061#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
Otavio Salvadorc8762d02015-07-23 11:02:29 -030062#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
63#define CONFIG_MXC_USB_FLAGS 0
64#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
Otavio Salvadorc8762d02015-07-23 11:02:29 -030065
Otavio Salvadoredd28992015-09-17 15:13:20 -030066#define CONFIG_USBD_HS
Otavio Salvadoredd28992015-09-17 15:13:20 -030067
Otavio Salvador6c46cd12015-07-23 11:02:30 -030068/* Framebuffer */
Otavio Salvador6c46cd12015-07-23 11:02:30 -030069#define CONFIG_VIDEO_IPUV3
Otavio Salvador6c46cd12015-07-23 11:02:30 -030070#define CONFIG_VIDEO_BMP_RLE8
71#define CONFIG_SPLASH_SCREEN
72#define CONFIG_SPLASH_SCREEN_ALIGN
73#define CONFIG_BMP_16BPP
74#define CONFIG_VIDEO_LOGO
75#define CONFIG_VIDEO_BMP_LOGO
Otavio Salvador6c46cd12015-07-23 11:02:30 -030076#define CONFIG_IMX_HDMI
77
Otavio Salvadordf82d002015-07-23 11:02:31 -030078/* SATA */
Otavio Salvadordf82d002015-07-23 11:02:31 -030079#define CONFIG_SYS_SATA_MAX_DEVICE 1
80#define CONFIG_DWC_AHSATA_PORT_ID 0
81#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
82#define CONFIG_LBA48
Otavio Salvadordf82d002015-07-23 11:02:31 -030083
Otavio Salvadore6b47822015-07-28 20:24:41 -030084/* Ethernet */
Otavio Salvadore6b47822015-07-28 20:24:41 -030085#define CONFIG_FEC_MXC
86#define CONFIG_MII
87#define IMX_FEC_BASE ENET_BASE_ADDR
88#define CONFIG_FEC_XCV_TYPE RGMII
89#define CONFIG_ETHPRIME "FEC"
90#define CONFIG_FEC_MXC_PHYADDR 6
Otavio Salvadore6b47822015-07-28 20:24:41 -030091#define CONFIG_PHY_ATHEROS
92
Otavio Salvador4ac01402015-07-23 11:02:33 -030093/* Command definition */
94
95#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -060096#define CONSOLE_DEV "ttymxc1"
Otavio Salvador4ac01402015-07-23 11:02:33 -030097#define CONFIG_MMCROOT "/dev/mmcblk0p2"
98#define CONFIG_SYS_MMC_ENV_DEV 0
SARTRE Leodce71762013-06-03 23:30:36 +000099
100#define CONFIG_EXTRA_ENV_SETTINGS \
101 "script=boot.scr\0" \
Otavio Salvador43465d92014-01-16 19:57:56 -0200102 "image=zImage\0" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200103 "fdtfile=undefined\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300104 "fdt_addr_r=0x18000000\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000105 "boot_fdt=try\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300106 "ip_dyn=yes\0" \
Simon Glass4694a742016-10-17 20:12:39 -0600107 "console=" CONSOLE_DEV "\0" \
Otavio Salvadorc102b9e2015-11-19 19:02:38 -0200108 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
109 "dfu_alt_info_spl=spl raw 0x400\0" \
110 "dfu_alt_info_img=u-boot raw 0x10000\0" \
111 "dfu_alt_info=spl raw 0x400\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300112 "bootm_size=0x10000000\0" \
113 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000114 "mmcpart=1\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300115 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
116 "update_sd_firmware=" \
117 "if test ${ip_dyn} = yes; then " \
118 "setenv get_cmd dhcp; " \
119 "else " \
120 "setenv get_cmd tftp; " \
121 "fi; " \
122 "if mmc dev ${mmcdev}; then " \
123 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
124 "setexpr fw_sz ${filesize} / 0x200; " \
125 "setexpr fw_sz ${fw_sz} + 1; " \
126 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
127 "fi; " \
128 "fi\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000129 "mmcargs=setenv bootargs console=${console},${baudrate} " \
130 "root=${mmcroot}\0" \
131 "loadbootscript=" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300132 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000133 "bootscript=echo Running bootscript from mmc ...; " \
134 "source\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300135 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
136 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000137 "mmcboot=echo Booting from mmc ...; " \
138 "run mmcargs; " \
139 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
140 "if run loadfdt; then " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300141 "bootz ${loadaddr} - ${fdt_addr_r}; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000142 "else " \
143 "if test ${boot_fdt} = try; then " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200144 "bootz; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000145 "else " \
146 "echo WARN: Cannot load the DT; " \
147 "fi; " \
148 "fi; " \
149 "else " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200150 "bootz; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300151 "fi;\0" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200152 "findfdt="\
153 "if test $board_rev = MX6Q ; then " \
154 "setenv fdtfile imx6q-qmx6.dtb; fi; " \
155 "if test $board_rev = MX6DL ; then " \
156 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \
157 "if test $fdtfile = undefined; then " \
158 "echo WARNING: Could not determine dtb to use; fi; \0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300159 "netargs=setenv bootargs console=${console},${baudrate} " \
160 "root=/dev/nfs " \
161 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
162 "netboot=echo Booting from net ...; " \
163 "run netargs; " \
164 "if test ${ip_dyn} = yes; then " \
165 "setenv get_cmd dhcp; " \
166 "else " \
167 "setenv get_cmd tftp; " \
168 "fi; " \
169 "${get_cmd} ${image}; " \
170 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
171 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
172 "bootz ${loadaddr} - ${fdt_addr_r}; " \
173 "else " \
174 "if test ${boot_fdt} = try; then " \
175 "bootz; " \
176 "else " \
177 "echo WARN: Cannot load the DT; " \
178 "fi; " \
179 "fi; " \
180 "else " \
181 "bootz; " \
182 "fi;\0" \
Otavio Salvadorf594b552015-11-19 19:02:33 -0200183 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
SARTRE Leodce71762013-06-03 23:30:36 +0000184
185#define CONFIG_BOOTCOMMAND \
Otavio Salvadorf594b552015-11-19 19:02:33 -0200186 "run spilock;" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200187 "run findfdt; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300188 "mmc dev ${mmcdev};" \
189 "if mmc rescan; then " \
190 "if run loadbootscript; then " \
191 "run bootscript; " \
192 "else " \
193 "if run loadimage; then " \
194 "run mmcboot; " \
195 "else run netboot; " \
196 "fi; " \
197 "fi; " \
198 "else run netboot; fi"
SARTRE Leodce71762013-06-03 23:30:36 +0000199
SARTRE Leodce71762013-06-03 23:30:36 +0000200#define CONFIG_SYS_MEMTEST_START 0x10000000
201#define CONFIG_SYS_MEMTEST_END 0x10010000
202#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
203
SARTRE Leodce71762013-06-03 23:30:36 +0000204/* Physical Memory Map */
205#define CONFIG_NR_DRAM_BANKS 1
206#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
SARTRE Leodce71762013-06-03 23:30:36 +0000207
208#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
209#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
210#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
211
212#define CONFIG_SYS_INIT_SP_OFFSET \
213 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
214#define CONFIG_SYS_INIT_SP_ADDR \
215 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
216
Peter Robinson4b671502015-05-22 17:30:45 +0100217/* Environment organization */
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200218#if defined (CONFIG_ENV_IS_IN_MMC)
SARTRE Leodce71762013-06-03 23:30:36 +0000219#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
220#define CONFIG_SYS_MMC_ENV_DEV 0
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200221#endif
222
223#define CONFIG_ENV_SIZE (8 * 1024)
224
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200225#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
226#define CONFIG_ENV_OFFSET (768 * 1024)
227#define CONFIG_ENV_SECT_SIZE (64 * 1024)
228#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
229#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
230#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
231#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
232#endif
SARTRE Leodce71762013-06-03 23:30:36 +0000233
SARTRE Leodce71762013-06-03 23:30:36 +0000234#endif /* __CONFIG_CGTQMX6EVAL_H */