Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 49568feff1e123d4b24079b0b8e92704658912b6 / . / include / configs / 3c120_devboard.h
blob: cc8b956a0909e4ccbe89a2e6c6e788ad6798cdf1 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]2/*
3 * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
4 * Scott McNutt <smcnutt@psyent.com>
5 * (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw>
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * BOARD/CPU
13 */
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]14
15/*
16 * SERIAL
17 */
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]18
19/*
Thomas Chou4d7d92f2015-10-23 14:55:36 +0800[diff] [blame]20 * CFI Flash
21 */
Thomas Chou4d7d92f2015-10-23 14:55:36 +0800[diff] [blame]22#define CONFIG_FLASH_CFI_DRIVER
23#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */
24#define CONFIG_SYS_FLASH_CFI
25#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
26#define CONFIG_SYS_FLASH_PROTECTION
Thomas Chouf0f9acc2015-10-28 15:10:39 +0800[diff] [blame]27#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
Thomas Chou4d7d92f2015-10-23 14:55:36 +0800[diff] [blame]28#define CONFIG_SYS_MAX_FLASH_SECT 512
29
30/*
Thomas Chou54af7642015-11-05 16:37:33 +0800[diff] [blame]31 * NET options
Thomas Chouec06dd82015-10-22 15:29:11 +0800[diff] [blame]32 */
Thomas Chou54af7642015-11-05 16:37:33 +0800[diff] [blame]33#define CONFIG_SYS_RX_ETH_BUFFER 0
Thomas Chouba5316e2015-10-29 16:43:46 +0800[diff] [blame]34#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
Thomas Chouec06dd82015-10-22 15:29:11 +0800[diff] [blame]35
36/*
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]37 * BOOTP options
38 */
39#define CONFIG_BOOTP_BOOTFILESIZE
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]40
41/*
Thomas Chou44d3cf42015-08-26 21:24:35 +0800[diff] [blame]42 * FDT options
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]43 */
Thomas Chou2f8e2562014-08-30 17:45:23 +0800[diff] [blame]44#define CONFIG_LMB
45
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]46/*
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]47 * MEMORY ORGANIZATION
Thomas Choufe06c182012-04-23 10:55:02 +0800[diff] [blame]48 * -Monitor at top of sdram.
49 * -The heap is placed below the monitor
50 * -The stack is placed below the heap (&grows down).
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]51 */
Thomas Chou4d7d92f2015-10-23 14:55:36 +0800[diff] [blame]52#define CONFIG_SYS_SDRAM_BASE 0xD0000000
53#define CONFIG_SYS_SDRAM_SIZE 0x08000000
Thomas Chou41d02bb2015-10-27 10:21:06 +0800[diff] [blame]54#define CONFIG_NR_DRAM_BANKS 1
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]55#define CONFIG_MONITOR_IS_IN_RAM
Marek Vasut307c7152015-12-15 03:09:23 +0100[diff] [blame]56#define CONFIG_SYS_MONITOR_LEN 0x80000 /* Reserve 512k */
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]57#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \
58 CONFIG_SYS_SDRAM_SIZE - \
59 CONFIG_SYS_MONITOR_LEN)
Thomas Chouc2ec5f82015-11-04 13:28:29 +0800[diff] [blame]60#define CONFIG_SYS_MALLOC_LEN 0x20000
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]61
62/*
Marek Vasuta979a6d2015-12-15 03:09:22 +0100[diff] [blame]63 * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
64 * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the
65 * reset address, no? This will keep the environment in user region
66 * of flash. NOTE: the monitor length must be multiple of sector size
67 * (which is common practice).
68 */
Marek Vasuta979a6d2015-12-15 03:09:22 +0100[diff] [blame]69
70#define CONFIG_ENV_SIZE 0x20000 /* 128k, 1 sector */
71#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
72#define CONFIG_ENV_ADDR (0xe2800000 + CONFIG_SYS_MONITOR_LEN)
73
74/*
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]75 * MISC
76 */
Marek Vasutd32b2af2015-12-15 03:09:24 +0100[diff] [blame]77#define CONFIG_SYS_LOAD_ADDR 0xd4000000 /* Half of RAM */
78#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]79#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
Thomas Choue486ab22015-11-04 13:25:20 +0800[diff] [blame]80#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MONITOR_BASE - \
81 CONFIG_ENV_SIZE - \
82 CONFIG_SYS_MALLOC_LEN - \
83 0x10000)
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]84
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800[diff] [blame]85#endif /* __CONFIG_H */