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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
SARTRE Leodce71762013-06-03 23:30:36 +00002/*
3 *
4 * Congatec Conga-QEVAl board configuration file.
5 *
6 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
7 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
8 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
9 * Leo Sartre, <lsartre@adeneo-embedded.com>
SARTRE Leodce71762013-06-03 23:30:36 +000010 */
11
12#ifndef __CONFIG_CGTQMX6EVAL_H
13#define __CONFIG_CGTQMX6EVAL_H
14
SARTRE Leodce71762013-06-03 23:30:36 +000015#include "mx6_common.h"
16
SARTRE Leodce71762013-06-03 23:30:36 +000017#define CONFIG_MACH_TYPE 4122
18
Otavio Salvadore186b182015-11-19 19:02:36 -020019#ifdef CONFIG_SPL
Otavio Salvadore186b182015-11-19 19:02:36 -020020#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
Otavio Salvadore186b182015-11-19 19:02:36 -020021#include "imx6_spl.h"
22#endif
23
SARTRE Leodce71762013-06-03 23:30:36 +000024/* Size of malloc() pool */
25#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
26
SARTRE Leodce71762013-06-03 23:30:36 +000027#define CONFIG_MXC_UART
28#define CONFIG_MXC_UART_BASE UART2_BASE
29
30/* MMC Configs */
SARTRE Leodce71762013-06-03 23:30:36 +000031#define CONFIG_SYS_FSL_ESDHC_ADDR 0
32
Otavio Salvadorf594b552015-11-19 19:02:33 -020033/* SPI NOR */
Otavio Salvadorf594b552015-11-19 19:02:33 -020034#define CONFIG_SPI_FLASH_STMICRO
35#define CONFIG_SPI_FLASH_SST
Otavio Salvadorf594b552015-11-19 19:02:33 -020036#define CONFIG_SF_DEFAULT_BUS 0
37#define CONFIG_SF_DEFAULT_SPEED 20000000
38#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
39
Otavio Salvador38881002015-07-23 11:02:27 -030040/* Thermal support */
Adrian Alonsoce08c362015-09-02 13:54:13 -050041#define CONFIG_IMX_THERMAL
Otavio Salvador38881002015-07-23 11:02:27 -030042
Otavio Salvador0378d632015-07-23 11:02:28 -030043/* I2C Configs */
Otavio Salvador0378d632015-07-23 11:02:28 -030044#define CONFIG_SYS_I2C
45#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020046#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
47#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Otavio Salvador0378d632015-07-23 11:02:28 -030048#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
49#define CONFIG_SYS_I2C_SPEED 100000
50
51/* PMIC */
52#define CONFIG_POWER
53#define CONFIG_POWER_I2C
54#define CONFIG_POWER_PFUZE100
55#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
56
Otavio Salvadorc8762d02015-07-23 11:02:29 -030057/* USB Configs */
Otavio Salvadorc8762d02015-07-23 11:02:29 -030058#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
Otavio Salvadorc8762d02015-07-23 11:02:29 -030059#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
60#define CONFIG_MXC_USB_FLAGS 0
61#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
Otavio Salvadorc8762d02015-07-23 11:02:29 -030062
Otavio Salvadoredd28992015-09-17 15:13:20 -030063#define CONFIG_USBD_HS
Otavio Salvadoredd28992015-09-17 15:13:20 -030064
Otavio Salvador6c46cd12015-07-23 11:02:30 -030065/* Framebuffer */
Otavio Salvador6c46cd12015-07-23 11:02:30 -030066#define CONFIG_VIDEO_IPUV3
Otavio Salvador6c46cd12015-07-23 11:02:30 -030067#define CONFIG_VIDEO_BMP_RLE8
68#define CONFIG_SPLASH_SCREEN
69#define CONFIG_SPLASH_SCREEN_ALIGN
70#define CONFIG_BMP_16BPP
71#define CONFIG_VIDEO_LOGO
72#define CONFIG_VIDEO_BMP_LOGO
Otavio Salvador6c46cd12015-07-23 11:02:30 -030073#define CONFIG_IMX_HDMI
74
Otavio Salvadordf82d002015-07-23 11:02:31 -030075/* SATA */
Otavio Salvadordf82d002015-07-23 11:02:31 -030076#define CONFIG_SYS_SATA_MAX_DEVICE 1
77#define CONFIG_DWC_AHSATA_PORT_ID 0
78#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
79#define CONFIG_LBA48
Otavio Salvadordf82d002015-07-23 11:02:31 -030080
Otavio Salvadore6b47822015-07-28 20:24:41 -030081/* Ethernet */
Otavio Salvadore6b47822015-07-28 20:24:41 -030082#define CONFIG_FEC_MXC
Otavio Salvadore6b47822015-07-28 20:24:41 -030083#define IMX_FEC_BASE ENET_BASE_ADDR
84#define CONFIG_FEC_XCV_TYPE RGMII
85#define CONFIG_ETHPRIME "FEC"
86#define CONFIG_FEC_MXC_PHYADDR 6
Otavio Salvadore6b47822015-07-28 20:24:41 -030087#define CONFIG_PHY_ATHEROS
88
Otavio Salvador4ac01402015-07-23 11:02:33 -030089/* Command definition */
90
91#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -060092#define CONSOLE_DEV "ttymxc1"
Otavio Salvador4ac01402015-07-23 11:02:33 -030093#define CONFIG_MMCROOT "/dev/mmcblk0p2"
94#define CONFIG_SYS_MMC_ENV_DEV 0
SARTRE Leodce71762013-06-03 23:30:36 +000095
96#define CONFIG_EXTRA_ENV_SETTINGS \
97 "script=boot.scr\0" \
Otavio Salvador43465d92014-01-16 19:57:56 -020098 "image=zImage\0" \
Otavio Salvadore186b182015-11-19 19:02:36 -020099 "fdtfile=undefined\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300100 "fdt_addr_r=0x18000000\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000101 "boot_fdt=try\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300102 "ip_dyn=yes\0" \
Simon Glass4694a742016-10-17 20:12:39 -0600103 "console=" CONSOLE_DEV "\0" \
Otavio Salvadorc102b9e2015-11-19 19:02:38 -0200104 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
105 "dfu_alt_info_spl=spl raw 0x400\0" \
106 "dfu_alt_info_img=u-boot raw 0x10000\0" \
107 "dfu_alt_info=spl raw 0x400\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300108 "bootm_size=0x10000000\0" \
109 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000110 "mmcpart=1\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300111 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
112 "update_sd_firmware=" \
113 "if test ${ip_dyn} = yes; then " \
114 "setenv get_cmd dhcp; " \
115 "else " \
116 "setenv get_cmd tftp; " \
117 "fi; " \
118 "if mmc dev ${mmcdev}; then " \
119 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
120 "setexpr fw_sz ${filesize} / 0x200; " \
121 "setexpr fw_sz ${fw_sz} + 1; " \
122 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
123 "fi; " \
124 "fi\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000125 "mmcargs=setenv bootargs console=${console},${baudrate} " \
126 "root=${mmcroot}\0" \
127 "loadbootscript=" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300128 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000129 "bootscript=echo Running bootscript from mmc ...; " \
130 "source\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300131 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
132 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000133 "mmcboot=echo Booting from mmc ...; " \
134 "run mmcargs; " \
135 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
136 "if run loadfdt; then " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300137 "bootz ${loadaddr} - ${fdt_addr_r}; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000138 "else " \
139 "if test ${boot_fdt} = try; then " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200140 "bootz; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000141 "else " \
142 "echo WARN: Cannot load the DT; " \
143 "fi; " \
144 "fi; " \
145 "else " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200146 "bootz; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300147 "fi;\0" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200148 "findfdt="\
149 "if test $board_rev = MX6Q ; then " \
150 "setenv fdtfile imx6q-qmx6.dtb; fi; " \
151 "if test $board_rev = MX6DL ; then " \
152 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \
153 "if test $fdtfile = undefined; then " \
154 "echo WARNING: Could not determine dtb to use; fi; \0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300155 "netargs=setenv bootargs console=${console},${baudrate} " \
156 "root=/dev/nfs " \
157 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
158 "netboot=echo Booting from net ...; " \
159 "run netargs; " \
160 "if test ${ip_dyn} = yes; then " \
161 "setenv get_cmd dhcp; " \
162 "else " \
163 "setenv get_cmd tftp; " \
164 "fi; " \
165 "${get_cmd} ${image}; " \
166 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
167 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
168 "bootz ${loadaddr} - ${fdt_addr_r}; " \
169 "else " \
170 "if test ${boot_fdt} = try; then " \
171 "bootz; " \
172 "else " \
173 "echo WARN: Cannot load the DT; " \
174 "fi; " \
175 "fi; " \
176 "else " \
177 "bootz; " \
178 "fi;\0" \
Otavio Salvadorf594b552015-11-19 19:02:33 -0200179 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
SARTRE Leodce71762013-06-03 23:30:36 +0000180
181#define CONFIG_BOOTCOMMAND \
Otavio Salvadorf594b552015-11-19 19:02:33 -0200182 "run spilock;" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200183 "run findfdt; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300184 "mmc dev ${mmcdev};" \
185 "if mmc rescan; then " \
186 "if run loadbootscript; then " \
187 "run bootscript; " \
188 "else " \
189 "if run loadimage; then " \
190 "run mmcboot; " \
191 "else run netboot; " \
192 "fi; " \
193 "fi; " \
194 "else run netboot; fi"
SARTRE Leodce71762013-06-03 23:30:36 +0000195
SARTRE Leodce71762013-06-03 23:30:36 +0000196#define CONFIG_SYS_MEMTEST_START 0x10000000
197#define CONFIG_SYS_MEMTEST_END 0x10010000
198#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
199
SARTRE Leodce71762013-06-03 23:30:36 +0000200/* Physical Memory Map */
SARTRE Leodce71762013-06-03 23:30:36 +0000201#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
SARTRE Leodce71762013-06-03 23:30:36 +0000202
203#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
204#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
205#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
206
207#define CONFIG_SYS_INIT_SP_OFFSET \
208 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
209#define CONFIG_SYS_INIT_SP_ADDR \
210 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
211
Peter Robinson4b671502015-05-22 17:30:45 +0100212/* Environment organization */
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200213#if defined (CONFIG_ENV_IS_IN_MMC)
SARTRE Leodce71762013-06-03 23:30:36 +0000214#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
215#define CONFIG_SYS_MMC_ENV_DEV 0
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200216#endif
217
218#define CONFIG_ENV_SIZE (8 * 1024)
219
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200220#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
221#define CONFIG_ENV_OFFSET (768 * 1024)
222#define CONFIG_ENV_SECT_SIZE (64 * 1024)
223#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
224#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
225#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
226#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
227#endif
SARTRE Leodce71762013-06-03 23:30:36 +0000228
SARTRE Leodce71762013-06-03 23:30:36 +0000229#endif /* __CONFIG_CGTQMX6EVAL_H */