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git01.mediatek.com / filogic / uboot / 44430f9cee6186c15ddfc7b6eb44901adf808b76 / . / test / dm / reset.c
blob: e2d6f456230c758364e34f32a335608a854e3edd [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]2/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]4 */
5
6#include <common.h>
7#include <dm.h>
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]8#include <dm/device-internal.h>
Simon Glass0f2af882020-05-10 11:40:05 -0600[diff] [blame]9#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -0700[diff] [blame]10#include <malloc.h>
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]11#include <reset.h>
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]12#include <dm/test.h>
13#include <asm/reset.h>
Simon Glass75c4d412020-07-19 10:15:37 -0600[diff] [blame]14#include <test/test.h>
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]15#include <test/ut.h>
16
17/* This must match the specifier for mbox-names="test" in the DT node */
18#define TEST_RESET_ID 2
19
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]20/* This is the other reset phandle specifier handled by bulk */
21#define OTHER_RESET_ID 2
22
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]23/* Base test of the reset uclass */
24static int dm_test_reset_base(struct unit_test_state *uts)
25{
26 struct udevice *dev;
Neil Armstrong9b4cdef2021-04-20 10:42:25 +0200[diff] [blame]27 struct reset_ctl reset_method1, reset_method1_1;
28 struct reset_ctl reset_method2, reset_method2_1;
29 struct reset_ctl reset_method3, reset_method3_1;
30 struct reset_ctl reset_method4, reset_method4_1;
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]31
32 /* Get the device using the reset device */
33 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
34 &dev));
35
36 /* Get the same reset port in 2 different ways and compare */
Neil Armstrong9b4cdef2021-04-20 10:42:25 +0200[diff] [blame]37 ut_assertok(reset_get_by_index(dev, 0, &reset_method1));
Samuel Holland6078bff2023-01-21 18:02:52 -0600[diff] [blame]38 ut_assertok(reset_get_by_name(dev, NULL, &reset_method1_1));
Neil Armstrong9b4cdef2021-04-20 10:42:25 +0200[diff] [blame]39 ut_assertok(reset_get_by_index(dev, 1, &reset_method2));
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]40 ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 1,
Neil Armstrong9b4cdef2021-04-20 10:42:25 +0200[diff] [blame]41 &reset_method2_1));
42 ut_assertok(reset_get_by_index(dev, 2, &reset_method3));
43 ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 2,
44 &reset_method3_1));
45 ut_assertok(reset_get_by_index(dev, 3, &reset_method4));
46 ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 3,
47 &reset_method4_1));
48
49 ut_asserteq(reset_method1.id, reset_method1_1.id);
50 ut_asserteq(reset_method2.id, reset_method2_1.id);
51 ut_asserteq(reset_method3.id, reset_method3_1.id);
52 ut_asserteq(reset_method4.id, reset_method4_1.id);
53
54 ut_asserteq(true, reset_method1.id != reset_method2.id);
55 ut_asserteq(true, reset_method1.id != reset_method3.id);
56 ut_asserteq(true, reset_method1.id != reset_method4.id);
57 ut_asserteq(true, reset_method2.id != reset_method3.id);
58 ut_asserteq(true, reset_method2.id != reset_method4.id);
59 ut_asserteq(true, reset_method3.id != reset_method4.id);
60
61 ut_asserteq(true, reset_method1_1.id != reset_method2_1.id);
62 ut_asserteq(true, reset_method1_1.id != reset_method3_1.id);
63 ut_asserteq(true, reset_method1_1.id != reset_method4_1.id);
64 ut_asserteq(true, reset_method2_1.id != reset_method3_1.id);
65 ut_asserteq(true, reset_method2_1.id != reset_method4_1.id);
66 ut_asserteq(true, reset_method3_1.id != reset_method4_1.id);
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]67
68 return 0;
69}
70
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]71DM_TEST(dm_test_reset_base, UT_TESTF_SCAN_FDT);
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]72
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]73static int dm_test_reset(struct unit_test_state *uts)
74{
75 struct udevice *dev_reset;
76 struct udevice *dev_test;
77
78 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
79 &dev_reset));
80 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
81
82 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
83 &dev_test));
84 ut_assertok(sandbox_reset_test_get(dev_test));
85
86 ut_assertok(sandbox_reset_test_assert(dev_test));
87 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
88
89 ut_assertok(sandbox_reset_test_deassert(dev_test));
90 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
91
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]92 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]93 ut_assertok(sandbox_reset_test_free(dev_test));
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]94 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]95
96 return 0;
97}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]98DM_TEST(dm_test_reset, UT_TESTF_SCAN_FDT);
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]99
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]100static int dm_test_reset_devm(struct unit_test_state *uts)
101{
102 struct udevice *dev_reset;
103 struct udevice *dev_test;
104
105 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
106 &dev_reset));
107 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
108 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
109 &dev_test));
110 ut_assertok(sandbox_reset_test_get_devm(dev_test));
111
112 ut_assertok(sandbox_reset_test_assert(dev_test));
113 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
114 ut_assertok(sandbox_reset_test_deassert(dev_test));
115 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
116
117 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
118 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
119 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
120
121 return 0;
122}
123DM_TEST(dm_test_reset_devm, UT_TESTF_SCAN_FDT);
124
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]125static int dm_test_reset_bulk(struct unit_test_state *uts)
126{
127 struct udevice *dev_reset;
128 struct udevice *dev_test;
129
130 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
131 &dev_reset));
132 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
133 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
134
135 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
136 &dev_test));
137 ut_assertok(sandbox_reset_test_get_bulk(dev_test));
138
139 ut_assertok(sandbox_reset_test_assert_bulk(dev_test));
140 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
141 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
142
143 ut_assertok(sandbox_reset_test_deassert_bulk(dev_test));
144 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
145 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
146
147 ut_assertok(sandbox_reset_test_release_bulk(dev_test));
148 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
149 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
150
151 return 0;
152}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]153DM_TEST(dm_test_reset_bulk, UT_TESTF_SCAN_FDT);
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]154
155static int dm_test_reset_bulk_devm(struct unit_test_state *uts)
156{
157 struct udevice *dev_reset;
158 struct udevice *dev_test;
159
160 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
161 &dev_reset));
162 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
163 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
164
165 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
166 &dev_test));
167 ut_assertok(sandbox_reset_test_get_bulk_devm(dev_test));
168
169 ut_assertok(sandbox_reset_test_assert_bulk(dev_test));
170 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
171 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
172
173 ut_assertok(sandbox_reset_test_deassert_bulk(dev_test));
174 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
175 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
176
177 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, OTHER_RESET_ID));
178 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
179 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
180 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
181 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, OTHER_RESET_ID));
182
183 return 0;
184}
185DM_TEST(dm_test_reset_bulk_devm, UT_TESTF_SCAN_FDT);