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git01.mediatek.com / filogic / uboot / 434e024732484b1ece724b362b12045a3c628cc1 / . / configs / mscc_luton_defconfig
blob: 178721d71af7d26db1b134baf0e940865025ae1e [file] [log] [blame]
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]1CONFIG_MIPS=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]2CONFIG_TEXT_BASE=0x40000000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]3CONFIG_SYS_MALLOC_LEN=0x1f0000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SIZE=0x2000
5CONFIG_ENV_OFFSET=0x100000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]6CONFIG_ENV_SECT_SIZE=0x40000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]7CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="luton_pcb091"
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]9CONFIG_DEBUG_UART_BASE=0x70100000
10CONFIG_DEBUG_UART_CLOCK=208333333
Tom Rini7c027e02022-06-20 08:13:12 -0400[diff] [blame]11CONFIG_DEBUG_UART_BOARD_INIT=y
Tom Rinid49f5822020-02-28 13:28:38 -0500[diff] [blame]12CONFIG_ENV_OFFSET_REDUND=0x140000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]13CONFIG_SYS_LOAD_ADDR=0x100000
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]14CONFIG_ARCH_MSCC=y
Lars Povlsen90392822018-12-20 09:56:05 +0100[diff] [blame]15CONFIG_SOC_LUTON=y
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]16CONFIG_DDRTYPE_MT47H128M8HQ=y
Daniel Schwierzeckff21b842022-07-10 17:15:14 +0200[diff] [blame]17CONFIG_SYS_MIPS_TIMER_FREQ=208333333
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]18CONFIG_MIPS_BOOT_FDT=y
19CONFIG_DEBUG_UART=y
Tom Rini76fbc6f2022-04-01 10:33:18 -0400[diff] [blame]20CONFIG_SYS_MEMTEST_START=0x80000000
21CONFIG_SYS_MEMTEST_END=0x87c00000
Tom Rini5d181d52022-06-29 09:54:02 -0400[diff] [blame]22CONFIG_SYS_LITTLE_ENDIAN=y
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]23CONFIG_FIT=y
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]24CONFIG_SYS_BOOTM_LEN=0x1000000
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]25CONFIG_BOOTDELAY=3
26CONFIG_USE_BOOTARGS=y
27CONFIG_BOOTARGS="console=ttyS0,115200"
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]28CONFIG_SYS_CBSIZE=256
29CONFIG_SYS_PBSIZE=281
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]30CONFIG_LOGLEVEL=7
Tom Rini9f8d9a22020-06-16 19:06:14 -0400[diff] [blame]31CONFIG_BOARD_TYPES=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]32CONFIG_DISPLAY_CPUINFO=y
Tom Rini51876ec2020-06-16 19:06:11 -0400[diff] [blame]33CONFIG_BOARD_EARLY_INIT_R=y
Tom Rinic4359852023-10-02 10:35:27 -0400[diff] [blame]34CONFIG_SYS_PROMPT="luton # "
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]35# CONFIG_CMD_BDI is not set
36# CONFIG_CMD_CONSOLE is not set
37# CONFIG_CMD_ELF is not set
38# CONFIG_CMD_EXPORTENV is not set
39# CONFIG_CMD_IMPORTENV is not set
40# CONFIG_CMD_CRC32 is not set
41CONFIG_CMD_MD5SUM=y
42CONFIG_CMD_MEMINFO=y
43CONFIG_CMD_MEMTEST=y
44# CONFIG_CMD_FLASH is not set
45CONFIG_CMD_GPIO=y
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]46CONFIG_CMD_SPI=y
47CONFIG_CMD_DHCP=y
48# CONFIG_NET_TFTP_VARS is not set
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]49CONFIG_CMD_PING=y
Lars Povlsen42106af2019-01-08 10:38:34 +0100[diff] [blame]50CONFIG_CMD_TIME=y
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]51CONFIG_CMD_MTDPARTS=y
52CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
53CONFIG_MTDPARTS_DEFAULT="mtdparts=spi_flash:512k(UBoot),256k(Env),256k(conf),6m@1m(linux)"
54# CONFIG_ISO_PARTITION is not set
Lars Povlsen90392822018-12-20 09:56:05 +0100[diff] [blame]55CONFIG_OF_LIST="luton_pcb090 luton_pcb091"
56CONFIG_DTB_RESELECT=y
57CONFIG_MULTI_DTB_FIT=y
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]58CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rini4bb26a42019-11-10 11:28:03 -0500[diff] [blame]59CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]60CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]61CONFIG_NET_RANDOM_ETHADDR=y
62CONFIG_CLK=y
Lars Povlsene6ce78c2019-01-02 09:52:24 +0100[diff] [blame]63CONFIG_MSCC_SGPIO=y
64CONFIG_LED=y
65CONFIG_LED_GPIO=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]66CONFIG_MTD=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]67CONFIG_DM_SPI_FLASH=y
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]68CONFIG_SPI_FLASH_BAR=y
69CONFIG_SPI_FLASH_GIGADEVICE=y
70CONFIG_SPI_FLASH_MACRONIX=y
71CONFIG_SPI_FLASH_SPANSION=y
72CONFIG_SPI_FLASH_STMICRO=y
73CONFIG_SPI_FLASH_WINBOND=y
74CONFIG_SPI_FLASH_MTD=y
Horatiu Vulturb33ecda2019-01-31 15:30:40 +0100[diff] [blame]75CONFIG_MSCC_LUTON_SWITCH=y
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]76CONFIG_PINCTRL=y
77CONFIG_PINCONF=y
Tom Rini37576b62020-06-16 19:06:21 -0400[diff] [blame]78CONFIG_SPECIFY_CONSOLE_INDEX=y
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]79CONFIG_DM_SERIAL=y
80CONFIG_DEBUG_UART_SHIFT=2
81CONFIG_SYS_NS16550=y
82CONFIG_SPI=y
83CONFIG_DM_SPI=y
Lars Povlsen42106af2019-01-08 10:38:34 +0100[diff] [blame]84CONFIG_MSCC_BB_SPI=y
Gregory CLEMENTdc253e22018-12-14 16:16:50 +0100[diff] [blame]85CONFIG_LZMA=y