Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/ufs/ufs-common.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Common properties for Universal Flash Storage (UFS) Host Controllers |
| 8 | |
| 9 | maintainers: |
| 10 | - Alim Akhtar <alim.akhtar@samsung.com> |
| 11 | - Avri Altman <avri.altman@wdc.com> |
| 12 | |
| 13 | properties: |
| 14 | clocks: true |
| 15 | |
| 16 | clock-names: true |
| 17 | |
| 18 | freq-table-hz: |
| 19 | items: |
| 20 | items: |
| 21 | - description: Minimum frequency for given clock in Hz |
| 22 | - description: Maximum frequency for given clock in Hz |
| 23 | deprecated: true |
| 24 | description: | |
| 25 | Preferred is operating-points-v2. |
| 26 | |
| 27 | Array of <min max> operating frequencies in Hz stored in the same order |
| 28 | as the clocks property. If either this property or operating-points-v2 is |
| 29 | not defined or a value in the array is "0" then it is assumed that the |
| 30 | frequency is set by the parent clock or a fixed rate clock source. |
| 31 | |
| 32 | operating-points-v2: |
| 33 | description: |
| 34 | Preferred over freq-table-hz. |
| 35 | If present, each OPP must contain array of frequencies stored in the same |
| 36 | order for each clock. If clock frequency in the array is "0" then it is |
| 37 | assumed that the frequency is set by the parent clock or a fixed rate |
| 38 | clock source. |
| 39 | |
| 40 | opp-table: |
| 41 | type: object |
| 42 | |
| 43 | interrupts: |
| 44 | maxItems: 1 |
| 45 | |
| 46 | lanes-per-direction: |
| 47 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 48 | enum: [1, 2] |
| 49 | default: 2 |
| 50 | description: |
| 51 | Number of lanes available per direction. Note that it is assume same |
| 52 | number of lanes is used both directions at once. |
| 53 | |
| 54 | vdd-hba-supply: |
| 55 | description: |
| 56 | Phandle to UFS host controller supply regulator node. |
| 57 | |
| 58 | vcc-supply: |
| 59 | description: |
| 60 | Phandle to VCC supply regulator node. |
| 61 | |
| 62 | vccq-supply: |
| 63 | description: |
| 64 | Phandle to VCCQ supply regulator node. |
| 65 | |
| 66 | vccq2-supply: |
| 67 | description: |
| 68 | Phandle to VCCQ2 supply regulator node. |
| 69 | |
| 70 | vcc-supply-1p8: |
| 71 | type: boolean |
| 72 | description: |
| 73 | For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V. This |
| 74 | boolean property when set, specifies to use low voltage range of |
| 75 | 1.7-1.95V. Note for external UFS cards this property is invalid and valid |
| 76 | VCC range is always 2.7-3.6V. |
| 77 | |
| 78 | vcc-max-microamp: |
| 79 | description: |
| 80 | Specifies max. load that can be drawn from VCC supply. |
| 81 | |
| 82 | vccq-max-microamp: |
| 83 | description: |
| 84 | Specifies max. load that can be drawn from VCCQ supply. |
| 85 | |
| 86 | vccq2-max-microamp: |
| 87 | description: |
| 88 | Specifies max. load that can be drawn from VCCQ2 supply. |
| 89 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 90 | msi-parent: true |
| 91 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 92 | dependencies: |
| 93 | freq-table-hz: [ clocks ] |
| 94 | operating-points-v2: [ clocks, clock-names ] |
| 95 | |
| 96 | required: |
| 97 | - interrupts |
| 98 | |
| 99 | allOf: |
| 100 | - if: |
| 101 | required: |
| 102 | - freq-table-hz |
| 103 | then: |
| 104 | properties: |
| 105 | operating-points-v2: false |
| 106 | - if: |
| 107 | required: |
| 108 | - operating-points-v2 |
| 109 | then: |
| 110 | properties: |
| 111 | freq-table-hz: false |
| 112 | |
| 113 | additionalProperties: true |