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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra210 XUSB pad controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13description: |
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
15 signals) which connect directly to pins/pads on the SoC package. Each lane
16 is controlled by a HW block referred to as a "pad" in the Tegra hardware
17 documentation. Each such "pad" may control either one or multiple lanes,
18 and thus contains any logic common to all its lanes. Each lane can be
19 separately configured and powered up.
20
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
25 ports (e.g. PCIe) and the lanes.
26
27 In addition to per-lane configuration, USB 3.0 ports may require additional
28 settings on a per-board basis.
29
30 Pads will be represented as children of the top-level XUSB pad controller
31 device tree node. Each lane exposed by the pad will be represented by its
32 own subnode and can be referenced by users of the lane using the standard
33 PHY bindings, as described by the phy-bindings.txt file in this directory.
34
35 The Tegra hardware documentation refers to the connection between the XUSB
36 pad controller and the XUSB controller as "ports". This is confusing since
37 "port" is typically used to denote the physical USB receptacle. The device
38 tree binding in this document uses the term "port" to refer to the logical
39 abstraction of the signals that are routed to a USB receptacle (i.e. a PHY
40 for the USB signal, the VBUS power supply, the USB 2.0 companion port for
41 USB 3.0 receptacles, ...).
42
43properties:
44 compatible:
45 const: nvidia,tegra210-xusb-padctl
46
47 reg:
48 maxItems: 1
49
50 resets:
51 items:
52 - description: pad controller reset
53
54 interrupts:
55 items:
56 - description: XUSB pad controller interrupt
57
58 reset-names:
59 items:
60 - const: padctl
61
62 avdd-pll-utmip-supply:
63 description: UTMI PLL power supply. Must supply 1.8 V.
64
65 avdd-pll-uerefe-supply:
66 description: PLLE reference PLL power supply. Must supply 1.05 V.
67
68 dvdd-pex-pll-supply:
69 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
70
71 hvdd-pex-pll-e-supply:
72 description: High-voltage PLLE power supply. Must supply 1.8 V.
73
74 nvidia,pmc:
75 description: phandle to the Tegra Power Management Controller (PMC) node
76 $ref: /schemas/types.yaml#/definitions/phandle
77
78 pads:
79 description: A required child node named "pads" contains a list of
80 subnodes, one for each of the pads exposed by the XUSB pad controller.
81 Each pad may need additional resources that can be referenced in its
82 pad node.
83
84 The "status" property is used to enable or disable the use of a pad.
85 If set to "disabled", the pad will not be used on the given board. In
86 order to use the pad and any of its lanes, this property must be set
87 to "okay" or be absent.
88 type: object
89 additionalProperties: false
90 properties:
91 usb2:
92 type: object
93 additionalProperties: false
94 properties:
95 clocks:
96 items:
97 - description: USB2 tracking clock
98
99 clock-names:
100 items:
101 - const: trk
102
103 lanes:
104 type: object
105 additionalProperties: false
106 properties:
107 usb2-0:
108 type: object
109 additionalProperties: false
110 properties:
111 "#phy-cells":
112 const: 0
113
114 nvidia,function:
115 description: Function selection for this lane.
116 $ref: /schemas/types.yaml#/definitions/string
117 enum: [ snps, xusb, uart ]
118
119 usb2-1:
120 type: object
121 additionalProperties: false
122 properties:
123 "#phy-cells":
124 const: 0
125
126 nvidia,function:
127 description: Function selection for this lane.
128 $ref: /schemas/types.yaml#/definitions/string
129 enum: [ snps, xusb, uart ]
130
131 usb2-2:
132 type: object
133 additionalProperties: false
134 properties:
135 "#phy-cells":
136 const: 0
137
138 nvidia,function:
139 description: Function selection for this lane.
140 $ref: /schemas/types.yaml#/definitions/string
141 enum: [ snps, xusb, uart ]
142
143 usb2-3:
144 type: object
145 additionalProperties: false
146 properties:
147 "#phy-cells":
148 const: 0
149
150 nvidia,function:
151 description: Function selection for this lane.
152 $ref: /schemas/types.yaml#/definitions/string
153 enum: [ snps, xusb, uart ]
154
155 hsic:
156 type: object
157 additionalProperties: false
158 properties:
159 clocks:
160 items:
161 - description: HSIC tracking clock
162
163 clock-names:
164 items:
165 - const: trk
166
167 lanes:
168 type: object
169 additionalProperties: false
170 properties:
171 hsic-0:
172 type: object
173 additionalProperties: false
174 properties:
175 "#phy-cells":
176 const: 0
177
178 nvidia,function:
179 description: Function selection for this lane.
180 $ref: /schemas/types.yaml#/definitions/string
181 enum: [ snps, xusb ]
182
183 hsic-1:
184 type: object
185 additionalProperties: false
186 properties:
187 "#phy-cells":
188 const: 0
189
190 nvidia,function:
191 description: Function selection for this lane.
192 $ref: /schemas/types.yaml#/definitions/string
193 enum: [ snps, xusb ]
194
195 pcie:
196 type: object
197 additionalProperties: false
198 properties:
199 clocks:
200 items:
201 - description: PCIe PLL clock source
202
203 clock-names:
204 items:
205 - const: pll
206
207 resets:
208 items:
209 - description: PCIe PHY reset
210
211 reset-names:
212 items:
213 - const: phy
214
215 lanes:
216 type: object
217 additionalProperties: false
218 properties:
219 pcie-0:
220 type: object
221 additionalProperties: false
222 properties:
223 "#phy-cells":
224 const: 0
225
226 nvidia,function:
227 description: Function selection for this lane.
228 $ref: /schemas/types.yaml#/definitions/string
229 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
230
231 pcie-1:
232 type: object
233 additionalProperties: false
234 properties:
235 "#phy-cells":
236 const: 0
237
238 nvidia,function:
239 description: Function selection for this lane.
240 $ref: /schemas/types.yaml#/definitions/string
241 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
242
243 pcie-2:
244 type: object
245 additionalProperties: false
246 properties:
247 "#phy-cells":
248 const: 0
249
250 nvidia,function:
251 description: Function selection for this lane.
252 $ref: /schemas/types.yaml#/definitions/string
253 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
254
255 pcie-3:
256 type: object
257 additionalProperties: false
258 properties:
259 "#phy-cells":
260 const: 0
261
262 nvidia,function:
263 description: Function selection for this lane.
264 $ref: /schemas/types.yaml#/definitions/string
265 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
266
267 pcie-4:
268 type: object
269 additionalProperties: false
270 properties:
271 "#phy-cells":
272 const: 0
273
274 nvidia,function:
275 description: Function selection for this lane.
276 $ref: /schemas/types.yaml#/definitions/string
277 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
278
279 pcie-5:
280 type: object
281 additionalProperties: false
282 properties:
283 "#phy-cells":
284 const: 0
285
286 nvidia,function:
287 description: Function selection for this lane.
288 $ref: /schemas/types.yaml#/definitions/string
289 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
290
291 pcie-6:
292 type: object
293 additionalProperties: false
294 properties:
295 "#phy-cells":
296 const: 0
297
298 nvidia,function:
299 description: Function selection for this lane.
300 $ref: /schemas/types.yaml#/definitions/string
301 enum: [ pcie-x1, usb3-ss, pcie-x4 ]
302
303 sata:
304 type: object
305 additionalProperties: false
306 properties:
307 clocks:
308 items:
309 - description: SATA PLL clock source
310
311 clock-names:
312 items:
313 - const: pll
314
315 resets:
316 items:
317 - description: SATA PHY reset
318
319 reset-names:
320 items:
321 - const: phy
322
323 lanes:
324 type: object
325 additionalProperties: false
326 properties:
327 sata-0:
328 type: object
329 additionalProperties: false
330 properties:
331 "#phy-cells":
332 const: 0
333
334 nvidia,function:
335 description: Function selection for this lane.
336 $ref: /schemas/types.yaml#/definitions/string
337 enum: [ usb3-ss, sata ]
338
339 ports:
340 description: A required child node named "ports" contains a list of
341 subnodes, one for each of the ports exposed by the XUSB pad controller.
342 Each port may need additional resources that can be referenced in its
343 port node.
344
345 The "status" property is used to enable or disable the use of a port.
346 If set to "disabled", the port will not be used on the given board. In
347 order to use the port, this property must be set to "okay".
348 type: object
349 additionalProperties: false
350 properties:
351 usb2-0:
352 type: object
353 additionalProperties: false
354 properties:
355 # no need to further describe this because the connector will
356 # match on gpio-usb-b-connector or usb-b-connector and cause
357 # that binding to be selected for the subnode
358 connector:
359 type: object
360
361 mode:
362 description: A string that determines the mode in which to
363 run the port.
364 $ref: /schemas/types.yaml#/definitions/string
365 enum: [ host, peripheral, otg ]
366
367 nvidia,internal:
368 description: A boolean property whose presence determines
369 that a port is internal. In the absence of this property
370 the port is considered to be external.
371 $ref: /schemas/types.yaml#/definitions/flag
372
373 usb-role-switch:
374 description: |
375 A boolean property whole presence indicates that the port
376 supports OTG or peripheral mode. If present, the port
377 supports switching between USB host and peripheral roles.
378 A connector must be added as a subnode in that case.
379
380 See ../connector/usb-connector.yaml.
381
382 vbus-supply:
383 description: A phandle to the regulator supplying the VBUS
384 voltage.
385
386 dependencies:
387 usb-role-switch: [ connector ]
388
389 usb2-1:
390 type: object
391 additionalProperties: false
392 properties:
393 # no need to further describe this because the connector will
394 # match on gpio-usb-b-connector or usb-b-connector and cause
395 # that binding to be selected for the subnode
396 connector:
397 type: object
398
399 mode:
400 description: A string that determines the mode in which to
401 run the port.
402 $ref: /schemas/types.yaml#/definitions/string
403 enum: [ host, peripheral, otg ]
404
405 nvidia,internal:
406 description: A boolean property whose presence determines
407 that a port is internal. In the absence of this property
408 the port is considered to be external.
409 $ref: /schemas/types.yaml#/definitions/flag
410
411 usb-role-switch:
412 description: |
413 A boolean property whole presence indicates that the port
414 supports OTG or peripheral mode. If present, the port
415 supports switching between USB host and peripheral roles.
416 A connector must be added as a subnode in that case.
417
418 See ../connector/usb-connector.yaml.
419
420 vbus-supply:
421 description: A phandle to the regulator supplying the VBUS
422 voltage.
423
424 dependencies:
425 usb-role-switch: [ connector ]
426
427 usb2-2:
428 type: object
429 additionalProperties: false
430 properties:
431 # no need to further describe this because the connector will
432 # match on gpio-usb-b-connector or usb-b-connector and cause
433 # that binding to be selected for the subnode
434 connector:
435 type: object
436
437 mode:
438 description: A string that determines the mode in which to
439 run the port.
440 $ref: /schemas/types.yaml#/definitions/string
441 enum: [ host, peripheral, otg ]
442
443 nvidia,internal:
444 description: A boolean property whose presence determines
445 that a port is internal. In the absence of this property
446 the port is considered to be external.
447 $ref: /schemas/types.yaml#/definitions/flag
448
449 usb-role-switch:
450 description: |
451 A boolean property whole presence indicates that the port
452 supports OTG or peripheral mode. If present, the port
453 supports switching between USB host and peripheral roles.
454 A connector must be added as a subnode in that case.
455
456 See ../connector/usb-connector.yaml.
457
458 vbus-supply:
459 description: A phandle to the regulator supplying the VBUS
460 voltage.
461
462 dependencies:
463 usb-role-switch: [ connector ]
464
465 usb2-3:
466 type: object
467 additionalProperties: false
468 properties:
469 # no need to further describe this because the connector will
470 # match on gpio-usb-b-connector or usb-b-connector and cause
471 # that binding to be selected for the subnode
472 connector:
473 type: object
474
475 mode:
476 description: A string that determines the mode in which to
477 run the port.
478 $ref: /schemas/types.yaml#/definitions/string
479 enum: [ host, peripheral, otg ]
480
481 nvidia,internal:
482 description: A boolean property whose presence determines
483 that a port is internal. In the absence of this property
484 the port is considered to be external.
485 $ref: /schemas/types.yaml#/definitions/flag
486
487 usb-role-switch:
488 description: |
489 A boolean property whole presence indicates that the port
490 supports OTG or peripheral mode. If present, the port
491 supports switching between USB host and peripheral roles.
492 A connector must be added as a subnode in that case.
493
494 See ../connector/usb-connector.yaml.
495
496 vbus-supply:
497 description: A phandle to the regulator supplying the VBUS
498 voltage.
499
500 dependencies:
501 usb-role-switch: [ connector ]
502
503 hsic-0:
504 type: object
505 additionalProperties: false
506 properties:
507 vbus-supply:
508 description: A phandle to the regulator supplying the VBUS
509 voltage.
510
511 hsic-1:
512 type: object
513 additionalProperties: false
514 properties:
515 vbus-supply:
516 description: A phandle to the regulator supplying the VBUS
517 voltage.
518
519 usb3-0:
520 type: object
521 additionalProperties: false
522 properties:
523 nvidia,internal:
524 description: A boolean property whose presence determines
525 that a port is internal. In the absence of this property
526 the port is considered to be external.
527 $ref: /schemas/types.yaml#/definitions/flag
528
529 nvidia,usb2-companion:
530 description: A single cell that specifies the physical port
531 number to map this super-speed USB port to. The range of
532 valid port numbers varies with the SoC generation.
533 $ref: /schemas/types.yaml#/definitions/uint32
534 enum: [ 0, 1, 2, 3 ]
535
536 vbus-supply:
537 description: A phandle to the regulator supplying the VBUS
538 voltage.
539
540 usb3-1:
541 type: object
542 additionalProperties: false
543 properties:
544 nvidia,internal:
545 description: A boolean property whose presence determines
546 that a port is internal. In the absence of this property
547 the port is considered to be external.
548 $ref: /schemas/types.yaml#/definitions/flag
549
550 nvidia,usb2-companion:
551 description: A single cell that specifies the physical port
552 number to map this super-speed USB port to. The range of
553 valid port numbers varies with the SoC generation.
554 $ref: /schemas/types.yaml#/definitions/uint32
555 enum: [ 0, 1, 2, 3 ]
556
557 vbus-supply:
558 description: A phandle to the regulator supplying the VBUS
559 voltage.
560
561 usb3-2:
562 type: object
563 additionalProperties: false
564 properties:
565 nvidia,internal:
566 description: A boolean property whose presence determines
567 that a port is internal. In the absence of this property
568 the port is considered to be external.
569 $ref: /schemas/types.yaml#/definitions/flag
570
571 nvidia,usb2-companion:
572 description: A single cell that specifies the physical port
573 number to map this super-speed USB port to. The range of
574 valid port numbers varies with the SoC generation.
575 $ref: /schemas/types.yaml#/definitions/uint32
576 enum: [ 0, 1, 2, 3 ]
577
578 vbus-supply:
579 description: A phandle to the regulator supplying the VBUS
580 voltage.
581
582 usb3-3:
583 type: object
584 additionalProperties: false
585 properties:
586 nvidia,internal:
587 description: A boolean property whose presence determines
588 that a port is internal. In the absence of this property
589 the port is considered to be external.
590 $ref: /schemas/types.yaml#/definitions/flag
591
592 nvidia,usb2-companion:
593 description: A single cell that specifies the physical port
594 number to map this super-speed USB port to. The range of
595 valid port numbers varies with the SoC generation.
596 $ref: /schemas/types.yaml#/definitions/uint32
597 enum: [ 0, 1, 2, 3 ]
598
599 vbus-supply:
600 description: A phandle to the regulator supplying the VBUS
601 voltage.
602
603additionalProperties: false
604
605required:
606 - avdd-pll-utmip-supply
607 - avdd-pll-uerefe-supply
608 - dvdd-pex-pll-supply
609 - hvdd-pex-pll-e-supply
610
611examples:
612 - |
613 #include <dt-bindings/clock/tegra210-car.h>
614 #include <dt-bindings/gpio/tegra-gpio.h>
615 #include <dt-bindings/interrupt-controller/arm-gic.h>
616
617 padctl@7009f000 {
618 compatible = "nvidia,tegra210-xusb-padctl";
619 reg = <0x7009f000 0x1000>;
620 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
621 resets = <&tegra_car 142>;
622 reset-names = "padctl";
623
624 avdd-pll-utmip-supply = <&vdd_1v8>;
625 avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
626 dvdd-pex-pll-supply = <&vdd_pex_1v05>;
627 hvdd-pex-pll-e-supply = <&vdd_1v8>;
628
629 pads {
630 usb2 {
631 clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>;
632 clock-names = "trk";
633
634 lanes {
635 usb2-0 {
636 nvidia,function = "xusb";
637 #phy-cells = <0>;
638 };
639
640 usb2-1 {
641 nvidia,function = "xusb";
642 #phy-cells = <0>;
643 };
644
645 usb2-2 {
646 nvidia,function = "xusb";
647 #phy-cells = <0>;
648 };
649
650 usb2-3 {
651 nvidia,function = "xusb";
652 #phy-cells = <0>;
653 };
654 };
655 };
656
657 hsic {
658 clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>;
659 clock-names = "trk";
660 status = "disabled";
661
662 lanes {
663 hsic-0 {
664 status = "disabled";
665 #phy-cells = <0>;
666 };
667
668 hsic-1 {
669 status = "disabled";
670 #phy-cells = <0>;
671 };
672 };
673 };
674
675 pcie {
676 clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
677 clock-names = "pll";
678 resets = <&tegra_car 205>;
679 reset-names = "phy";
680
681 lanes {
682 pcie-0 {
683 nvidia,function = "pcie-x1";
684 #phy-cells = <0>;
685 };
686
687 pcie-1 {
688 nvidia,function = "pcie-x4";
689 #phy-cells = <0>;
690 };
691
692 pcie-2 {
693 nvidia,function = "pcie-x4";
694 #phy-cells = <0>;
695 };
696
697 pcie-3 {
698 nvidia,function = "pcie-x4";
699 #phy-cells = <0>;
700 };
701
702 pcie-4 {
703 nvidia,function = "pcie-x4";
704 #phy-cells = <0>;
705 };
706
707 pcie-5 {
708 nvidia,function = "usb3-ss";
709 #phy-cells = <0>;
710 };
711
712 pcie-6 {
713 nvidia,function = "usb3-ss";
714 #phy-cells = <0>;
715 };
716 };
717 };
718
719 sata {
720 clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
721 clock-names = "pll";
722 resets = <&tegra_car 204>;
723 reset-names = "phy";
724
725 lanes {
726 sata-0 {
727 nvidia,function = "sata";
728 #phy-cells = <0>;
729 };
730 };
731 };
732 };
733
734 ports {
735 usb2-0 {
736 mode = "peripheral";
737 usb-role-switch;
738
739 connector {
740 compatible = "gpio-usb-b-connector",
741 "usb-b-connector";
742 label = "micro-USB";
743 type = "micro";
744 vbus-gpios = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_LOW>;
745 };
746 };
747
748 usb2-1 {
749 vbus-supply = <&vdd_5v0_rtl>;
750 mode = "host";
751 };
752
753 usb2-2 {
754 vbus-supply = <&vdd_usb_vbus>;
755 mode = "host";
756 };
757
758 usb2-3 {
759 mode = "host";
760 };
761
762 hsic-0 {
763 status = "disabled";
764 };
765
766 hsic-1 {
767 status = "disabled";
768 };
769
770 usb3-0 {
771 nvidia,usb2-companion = <1>;
772 };
773
774 usb3-1 {
775 nvidia,usb2-companion = <2>;
776 };
777
778 usb3-2 {
779 status = "disabled";
780 };
781
782 usb3-3 {
783 status = "disabled";
784 };
785 };
786 };