Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2002 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Tom Rini | dec7ea0 | 2024-05-20 13:35:03 -0600 | [diff] [blame] | 7 | #include <config.h> |
| 8 | #include <linux/kernel.h> |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 9 | |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 10 | #include <post.h> |
| 11 | |
Yuri Tikhonov | c3655b8 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 12 | extern int ocm_post_test (int flags); |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 13 | extern int cache_post_test (int flags); |
| 14 | extern int watchdog_post_test (int flags); |
| 15 | extern int i2c_post_test (int flags); |
| 16 | extern int rtc_post_test (int flags); |
| 17 | extern int memory_post_test (int flags); |
| 18 | extern int cpu_post_test (int flags); |
Igor Lisitsin | 95bcd38 | 2007-03-28 19:06:19 +0400 | [diff] [blame] | 19 | extern int fpu_post_test (int flags); |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 20 | extern int uart_post_test (int flags); |
| 21 | extern int ether_post_test (int flags); |
| 22 | extern int spi_post_test (int flags); |
| 23 | extern int usb_post_test (int flags); |
| 24 | extern int spr_post_test (int flags); |
wdenk | c08f158 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 25 | extern int sysmon_post_test (int flags); |
wdenk | 6164217 | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 26 | extern int dsp_post_test (int flags); |
wdenk | c4e854f | 2004-06-07 23:46:25 +0000 | [diff] [blame] | 27 | extern int codec_post_test (int flags); |
Pavel Kolesnikov | 5d89611 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 28 | extern int ecc_post_test (int flags); |
Mike Frysinger | 813531f | 2011-05-10 13:35:40 +0000 | [diff] [blame] | 29 | extern int flash_post_test(int flags); |
wdenk | c08f158 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 30 | |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 31 | extern int dspic_init_post_test (int flags); |
| 32 | extern int dspic_post_test (int flags); |
| 33 | extern int gdc_post_test (int flags); |
| 34 | extern int fpga_post_test (int flags); |
| 35 | extern int lwmon5_watchdog_post_test(int flags); |
| 36 | extern int sysmon1_post_test(int flags); |
Anatolij Gustschin | 810b207 | 2010-04-24 19:27:11 +0200 | [diff] [blame] | 37 | extern int coprocessor_post_test(int flags); |
Mike Frysinger | 32ed1fe | 2011-05-10 16:22:25 -0400 | [diff] [blame] | 38 | extern int led_post_test(int flags); |
| 39 | extern int button_post_test(int flags); |
Valentin Longchamp | 24db42a | 2011-09-12 04:18:40 +0000 | [diff] [blame] | 40 | extern int memory_regions_post_test(int flags); |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 41 | |
wdenk | c08f158 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 42 | extern int sysmon_init_f (void); |
| 43 | |
| 44 | extern void sysmon_reloc (void); |
| 45 | |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 46 | |
| 47 | struct post_test post_list[] = |
| 48 | { |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 49 | #if CFG_POST & CFG_SYS_POST_OCM |
Yuri Tikhonov | c3655b8 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 50 | { |
| 51 | "OCM test", |
| 52 | "ocm", |
| 53 | "This test checks on chip memory (OCM).", |
Yuri Tikhonov | 9c667bf | 2008-05-08 15:46:02 +0200 | [diff] [blame] | 54 | POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP, |
Yuri Tikhonov | c3655b8 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 55 | &ocm_post_test, |
| 56 | NULL, |
| 57 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 58 | CFG_SYS_POST_OCM |
Yuri Tikhonov | c3655b8 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 59 | }, |
| 60 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 61 | #if CFG_POST & CFG_SYS_POST_CACHE |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 62 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 63 | "Cache test", |
| 64 | "cache", |
| 65 | "This test verifies the CPU cache operation.", |
| 66 | POST_RAM | POST_ALWAYS, |
| 67 | &cache_post_test, |
| 68 | NULL, |
| 69 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 70 | CFG_SYS_POST_CACHE |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 71 | }, |
| 72 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 73 | #if CFG_POST & CFG_SYS_POST_WATCHDOG |
Tom Rini | 8eaa3c7 | 2022-11-19 18:45:44 -0500 | [diff] [blame] | 74 | #if defined(CFG_POST_WATCHDOG) |
| 75 | CFG_POST_WATCHDOG, |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 76 | #else |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 77 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 78 | "Watchdog timer test", |
| 79 | "watchdog", |
| 80 | "This test checks the watchdog timer.", |
wdenk | dccbda0 | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 81 | POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 82 | &watchdog_post_test, |
| 83 | NULL, |
| 84 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 85 | CFG_SYS_POST_WATCHDOG |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 86 | }, |
| 87 | #endif |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 88 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 89 | #if CFG_POST & CFG_SYS_POST_I2C |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 90 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 91 | "I2C test", |
| 92 | "i2c", |
| 93 | "This test verifies the I2C operation.", |
| 94 | POST_RAM | POST_ALWAYS, |
| 95 | &i2c_post_test, |
| 96 | NULL, |
| 97 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 98 | CFG_SYS_POST_I2C |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 99 | }, |
| 100 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 101 | #if CFG_POST & CFG_SYS_POST_RTC |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 102 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 103 | "RTC test", |
| 104 | "rtc", |
| 105 | "This test verifies the RTC operation.", |
wdenk | dccbda0 | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 106 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 107 | &rtc_post_test, |
| 108 | NULL, |
| 109 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 110 | CFG_SYS_POST_RTC |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 111 | }, |
| 112 | #endif |
Tom Rini | 8eaa3c7 | 2022-11-19 18:45:44 -0500 | [diff] [blame] | 113 | #if CFG_POST & CFG_SYS_POST_MEMORY |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 114 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 115 | "Memory test", |
| 116 | "memory", |
| 117 | "This test checks RAM.", |
wdenk | dccbda0 | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 118 | POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 119 | &memory_post_test, |
| 120 | NULL, |
| 121 | NULL, |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 122 | CFG_SYS_POST_MEMORY |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 123 | }, |
| 124 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 125 | #if CFG_POST & CFG_SYS_POST_CPU |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 126 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 127 | "CPU test", |
| 128 | "cpu", |
| 129 | "This test verifies the arithmetic logic unit of" |
| 130 | " CPU.", |
| 131 | POST_RAM | POST_ALWAYS, |
| 132 | &cpu_post_test, |
| 133 | NULL, |
| 134 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 135 | CFG_SYS_POST_CPU |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 136 | }, |
| 137 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 138 | #if CFG_POST & CFG_SYS_POST_FPU |
Igor Lisitsin | 95bcd38 | 2007-03-28 19:06:19 +0400 | [diff] [blame] | 139 | { |
| 140 | "FPU test", |
| 141 | "fpu", |
| 142 | "This test verifies the arithmetic logic unit of" |
| 143 | " FPU.", |
| 144 | POST_RAM | POST_ALWAYS, |
| 145 | &fpu_post_test, |
| 146 | NULL, |
| 147 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 148 | CFG_SYS_POST_FPU |
Igor Lisitsin | 95bcd38 | 2007-03-28 19:06:19 +0400 | [diff] [blame] | 149 | }, |
| 150 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 151 | #if CFG_POST & CFG_SYS_POST_UART |
Tom Rini | 8eaa3c7 | 2022-11-19 18:45:44 -0500 | [diff] [blame] | 152 | #if defined(CFG_POST_UART) |
| 153 | CFG_POST_UART, |
Stefan Roese | 770b00b | 2010-10-07 14:16:25 +0200 | [diff] [blame] | 154 | #else |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 155 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 156 | "UART test", |
| 157 | "uart", |
| 158 | "This test verifies the UART operation.", |
wdenk | dccbda0 | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 159 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 160 | &uart_post_test, |
| 161 | NULL, |
| 162 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 163 | CFG_SYS_POST_UART |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 164 | }, |
Tom Rini | 8eaa3c7 | 2022-11-19 18:45:44 -0500 | [diff] [blame] | 165 | #endif /* CFG_POST_UART */ |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 166 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 167 | #if CFG_POST & CFG_SYS_POST_ETHER |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 168 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 169 | "ETHERNET test", |
| 170 | "ethernet", |
| 171 | "This test verifies the ETHERNET operation.", |
Robert P. J. Day | 15bdcaf | 2016-03-27 10:18:55 -0400 | [diff] [blame] | 172 | POST_RAM | POST_ALWAYS, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 173 | ðer_post_test, |
| 174 | NULL, |
| 175 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 176 | CFG_SYS_POST_ETHER |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 177 | }, |
| 178 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 179 | #if CFG_POST & CFG_SYS_POST_USB |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 180 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 181 | "USB test", |
| 182 | "usb", |
| 183 | "This test verifies the USB operation.", |
Robert P. J. Day | 15bdcaf | 2016-03-27 10:18:55 -0400 | [diff] [blame] | 184 | POST_RAM | POST_ALWAYS, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 185 | &usb_post_test, |
| 186 | NULL, |
| 187 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 188 | CFG_SYS_POST_USB |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 189 | }, |
| 190 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 191 | #if CFG_POST & CFG_SYS_POST_SPR |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 192 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 193 | "SPR test", |
| 194 | "spr", |
| 195 | "This test checks SPR contents.", |
Stefan Roese | 191a8dc | 2008-01-09 10:38:58 +0100 | [diff] [blame] | 196 | POST_RAM | POST_ALWAYS, |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 197 | &spr_post_test, |
| 198 | NULL, |
| 199 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 200 | CFG_SYS_POST_SPR |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 201 | }, |
| 202 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 203 | #if CFG_POST & CFG_SYS_POST_SYSMON |
wdenk | c08f158 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 204 | { |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 205 | "SYSMON test", |
| 206 | "sysmon", |
| 207 | "This test monitors system hardware.", |
| 208 | POST_RAM | POST_ALWAYS, |
| 209 | &sysmon_post_test, |
| 210 | &sysmon_init_f, |
| 211 | &sysmon_reloc, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 212 | CFG_SYS_POST_SYSMON |
wdenk | c08f158 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 213 | }, |
| 214 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 215 | #if CFG_POST & CFG_SYS_POST_DSP |
wdenk | 6164217 | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 216 | { |
| 217 | "DSP test", |
| 218 | "dsp", |
| 219 | "This test checks any connected DSP(s).", |
Robert P. J. Day | 15bdcaf | 2016-03-27 10:18:55 -0400 | [diff] [blame] | 220 | POST_RAM | POST_ALWAYS, |
wdenk | 6164217 | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 221 | &dsp_post_test, |
| 222 | NULL, |
| 223 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 224 | CFG_SYS_POST_DSP |
wdenk | 6164217 | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 225 | }, |
| 226 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 227 | #if CFG_POST & CFG_SYS_POST_CODEC |
wdenk | c4e854f | 2004-06-07 23:46:25 +0000 | [diff] [blame] | 228 | { |
| 229 | "CODEC test", |
| 230 | "codec", |
| 231 | "This test checks any connected codec(s).", |
| 232 | POST_RAM | POST_MANUAL, |
| 233 | &codec_post_test, |
| 234 | NULL, |
| 235 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 236 | CFG_SYS_POST_CODEC |
wdenk | c4e854f | 2004-06-07 23:46:25 +0000 | [diff] [blame] | 237 | }, |
| 238 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 239 | #if CFG_POST & CFG_SYS_POST_ECC |
Pavel Kolesnikov | 5d89611 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 240 | { |
| 241 | "ECC test", |
| 242 | "ecc", |
Larry Johnson | c2abd6e | 2008-01-12 23:35:33 -0500 | [diff] [blame] | 243 | "This test checks the ECC facility of memory.", |
| 244 | POST_ROM | POST_ALWAYS | POST_PREREL, |
Pavel Kolesnikov | 5d89611 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 245 | &ecc_post_test, |
| 246 | NULL, |
| 247 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 248 | CFG_SYS_POST_ECC |
Pavel Kolesnikov | 5d89611 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 249 | }, |
| 250 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 251 | #if CFG_POST & CFG_SYS_POST_BSPEC1 |
Tom Rini | 8eaa3c7 | 2022-11-19 18:45:44 -0500 | [diff] [blame] | 252 | CFG_POST_BSPEC1, |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 253 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 254 | #if CFG_POST & CFG_SYS_POST_BSPEC2 |
Tom Rini | 8eaa3c7 | 2022-11-19 18:45:44 -0500 | [diff] [blame] | 255 | CFG_POST_BSPEC2, |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 256 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 257 | #if CFG_POST & CFG_SYS_POST_BSPEC3 |
Tom Rini | 8eaa3c7 | 2022-11-19 18:45:44 -0500 | [diff] [blame] | 258 | CFG_POST_BSPEC3, |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 259 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 260 | #if CFG_POST & CFG_SYS_POST_BSPEC4 |
Tom Rini | 8eaa3c7 | 2022-11-19 18:45:44 -0500 | [diff] [blame] | 261 | CFG_POST_BSPEC4, |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 262 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 263 | #if CFG_POST & CFG_SYS_POST_BSPEC5 |
Tom Rini | 8eaa3c7 | 2022-11-19 18:45:44 -0500 | [diff] [blame] | 264 | CFG_POST_BSPEC5, |
Yuri Tikhonov | c147d48 | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 265 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 266 | #if CFG_POST & CFG_SYS_POST_COPROC |
Anatolij Gustschin | 810b207 | 2010-04-24 19:27:11 +0200 | [diff] [blame] | 267 | { |
| 268 | "Coprocessors communication test", |
| 269 | "coproc_com", |
| 270 | "This test checks communication with coprocessors.", |
| 271 | POST_RAM | POST_ALWAYS | POST_CRITICAL, |
| 272 | &coprocessor_post_test, |
| 273 | NULL, |
| 274 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 275 | CFG_SYS_POST_COPROC |
Mike Frysinger | 813531f | 2011-05-10 13:35:40 +0000 | [diff] [blame] | 276 | }, |
| 277 | #endif |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 278 | #if CFG_POST & CFG_SYS_POST_FLASH |
Mike Frysinger | 813531f | 2011-05-10 13:35:40 +0000 | [diff] [blame] | 279 | { |
| 280 | "Parallel NOR flash test", |
| 281 | "flash", |
| 282 | "This test verifies parallel flash operations.", |
| 283 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
| 284 | &flash_post_test, |
| 285 | NULL, |
| 286 | NULL, |
Tom Rini | 3dd5d4a | 2022-12-04 10:14:17 -0500 | [diff] [blame] | 287 | CFG_SYS_POST_FLASH |
Mike Frysinger | 813531f | 2011-05-10 13:35:40 +0000 | [diff] [blame] | 288 | }, |
Anatolij Gustschin | 810b207 | 2010-04-24 19:27:11 +0200 | [diff] [blame] | 289 | #endif |
Tom Rini | 8eaa3c7 | 2022-11-19 18:45:44 -0500 | [diff] [blame] | 290 | #if CFG_POST & CFG_SYS_POST_MEM_REGIONS |
Valentin Longchamp | 24db42a | 2011-09-12 04:18:40 +0000 | [diff] [blame] | 291 | { |
| 292 | "Memory regions test", |
| 293 | "mem_regions", |
| 294 | "This test checks regularly placed regions of the RAM.", |
| 295 | POST_ROM | POST_SLOWTEST | POST_PREREL, |
| 296 | &memory_regions_post_test, |
| 297 | NULL, |
| 298 | NULL, |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 299 | CFG_SYS_POST_MEM_REGIONS |
Valentin Longchamp | 24db42a | 2011-09-12 04:18:40 +0000 | [diff] [blame] | 300 | }, |
| 301 | #endif |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 302 | }; |
| 303 | |
Mike Frysinger | 83a687b | 2011-05-10 07:28:35 +0000 | [diff] [blame] | 304 | unsigned int post_list_size = ARRAY_SIZE(post_list); |