blob: bce53302e68474846b14fb76e2965ecf5c4cf92d [file] [log] [blame]
wdenk324f6cf2002-10-07 21:13:39 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
wdenk9dfa8d12002-12-08 09:53:23 +000022 *
23 * Be sure to mark tests to be run before relocation as such with the
24 * CFG_POST_PREREL flag so that logging is done correctly if the
25 * logbuffer support is enabled.
wdenk324f6cf2002-10-07 21:13:39 +000026 */
27
28#include <common.h>
29
30#ifdef CONFIG_POST
31
32#include <post.h>
33
34extern int cache_post_test (int flags);
35extern int watchdog_post_test (int flags);
36extern int i2c_post_test (int flags);
37extern int rtc_post_test (int flags);
38extern int memory_post_test (int flags);
39extern int cpu_post_test (int flags);
40extern int uart_post_test (int flags);
41extern int ether_post_test (int flags);
42extern int spi_post_test (int flags);
43extern int usb_post_test (int flags);
44extern int spr_post_test (int flags);
wdenkc08f1582003-04-27 22:52:51 +000045extern int sysmon_post_test (int flags);
wdenk61642172004-04-15 21:16:42 +000046extern int dsp_post_test (int flags);
wdenkc08f1582003-04-27 22:52:51 +000047
48extern int sysmon_init_f (void);
49
50extern void sysmon_reloc (void);
51
wdenk324f6cf2002-10-07 21:13:39 +000052
53struct post_test post_list[] =
54{
55#if CONFIG_POST & CFG_POST_CACHE
56 {
wdenk57b2d802003-06-27 21:31:46 +000057 "Cache test",
58 "cache",
59 "This test verifies the CPU cache operation.",
60 POST_RAM | POST_ALWAYS,
61 &cache_post_test,
62 NULL,
63 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +000064 CFG_POST_CACHE
wdenk324f6cf2002-10-07 21:13:39 +000065 },
66#endif
67#if CONFIG_POST & CFG_POST_WATCHDOG
68 {
wdenk57b2d802003-06-27 21:31:46 +000069 "Watchdog timer test",
70 "watchdog",
71 "This test checks the watchdog timer.",
wdenkdccbda02003-07-14 22:13:32 +000072 POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
wdenk57b2d802003-06-27 21:31:46 +000073 &watchdog_post_test,
74 NULL,
75 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +000076 CFG_POST_WATCHDOG
wdenk324f6cf2002-10-07 21:13:39 +000077 },
78#endif
79#if CONFIG_POST & CFG_POST_I2C
80 {
wdenk57b2d802003-06-27 21:31:46 +000081 "I2C test",
82 "i2c",
83 "This test verifies the I2C operation.",
84 POST_RAM | POST_ALWAYS,
85 &i2c_post_test,
86 NULL,
87 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +000088 CFG_POST_I2C
wdenk324f6cf2002-10-07 21:13:39 +000089 },
90#endif
91#if CONFIG_POST & CFG_POST_RTC
92 {
wdenk57b2d802003-06-27 21:31:46 +000093 "RTC test",
94 "rtc",
95 "This test verifies the RTC operation.",
wdenkdccbda02003-07-14 22:13:32 +000096 POST_RAM | POST_SLOWTEST | POST_MANUAL,
wdenk57b2d802003-06-27 21:31:46 +000097 &rtc_post_test,
98 NULL,
99 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +0000100 CFG_POST_RTC
wdenk324f6cf2002-10-07 21:13:39 +0000101 },
102#endif
103#if CONFIG_POST & CFG_POST_MEMORY
104 {
wdenk57b2d802003-06-27 21:31:46 +0000105 "Memory test",
106 "memory",
107 "This test checks RAM.",
wdenkdccbda02003-07-14 22:13:32 +0000108 POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
wdenk57b2d802003-06-27 21:31:46 +0000109 &memory_post_test,
110 NULL,
111 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +0000112 CFG_POST_MEMORY
wdenk324f6cf2002-10-07 21:13:39 +0000113 },
114#endif
115#if CONFIG_POST & CFG_POST_CPU
116 {
wdenk57b2d802003-06-27 21:31:46 +0000117 "CPU test",
118 "cpu",
119 "This test verifies the arithmetic logic unit of"
120 " CPU.",
121 POST_RAM | POST_ALWAYS,
122 &cpu_post_test,
123 NULL,
124 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +0000125 CFG_POST_CPU
wdenk324f6cf2002-10-07 21:13:39 +0000126 },
127#endif
128#if CONFIG_POST & CFG_POST_UART
129 {
wdenk57b2d802003-06-27 21:31:46 +0000130 "UART test",
131 "uart",
132 "This test verifies the UART operation.",
wdenkdccbda02003-07-14 22:13:32 +0000133 POST_RAM | POST_SLOWTEST | POST_MANUAL,
wdenk57b2d802003-06-27 21:31:46 +0000134 &uart_post_test,
135 NULL,
136 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +0000137 CFG_POST_UART
wdenk324f6cf2002-10-07 21:13:39 +0000138 },
139#endif
140#if CONFIG_POST & CFG_POST_ETHER
141 {
wdenk57b2d802003-06-27 21:31:46 +0000142 "ETHERNET test",
143 "ethernet",
144 "This test verifies the ETHERNET operation.",
145 POST_RAM | POST_ALWAYS | POST_MANUAL,
146 &ether_post_test,
147 NULL,
148 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +0000149 CFG_POST_ETHER
wdenk324f6cf2002-10-07 21:13:39 +0000150 },
151#endif
152#if CONFIG_POST & CFG_POST_SPI
153 {
wdenk57b2d802003-06-27 21:31:46 +0000154 "SPI test",
155 "spi",
156 "This test verifies the SPI operation.",
157 POST_RAM | POST_ALWAYS | POST_MANUAL,
158 &spi_post_test,
159 NULL,
160 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +0000161 CFG_POST_SPI
wdenk324f6cf2002-10-07 21:13:39 +0000162 },
163#endif
164#if CONFIG_POST & CFG_POST_USB
165 {
wdenk57b2d802003-06-27 21:31:46 +0000166 "USB test",
167 "usb",
168 "This test verifies the USB operation.",
169 POST_RAM | POST_ALWAYS | POST_MANUAL,
170 &usb_post_test,
171 NULL,
172 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +0000173 CFG_POST_USB
wdenk324f6cf2002-10-07 21:13:39 +0000174 },
175#endif
176#if CONFIG_POST & CFG_POST_SPR
177 {
wdenk57b2d802003-06-27 21:31:46 +0000178 "SPR test",
179 "spr",
180 "This test checks SPR contents.",
181 POST_ROM | POST_ALWAYS | POST_PREREL,
182 &spr_post_test,
183 NULL,
184 NULL,
wdenk9dfa8d12002-12-08 09:53:23 +0000185 CFG_POST_SPR
wdenk324f6cf2002-10-07 21:13:39 +0000186 },
187#endif
wdenkc08f1582003-04-27 22:52:51 +0000188#if CONFIG_POST & CFG_POST_SYSMON
189 {
wdenk57b2d802003-06-27 21:31:46 +0000190 "SYSMON test",
191 "sysmon",
192 "This test monitors system hardware.",
193 POST_RAM | POST_ALWAYS,
194 &sysmon_post_test,
195 &sysmon_init_f,
196 &sysmon_reloc,
wdenkc08f1582003-04-27 22:52:51 +0000197 CFG_POST_SYSMON
198 },
199#endif
wdenk61642172004-04-15 21:16:42 +0000200#if CONFIG_POST & CFG_POST_DSP
201 {
202 "DSP test",
203 "dsp",
204 "This test checks any connected DSP(s).",
205 POST_RAM | POST_MANUAL,
206 &dsp_post_test,
207 NULL,
208 NULL,
209 CFG_POST_DSP
210 },
211#endif
wdenk324f6cf2002-10-07 21:13:39 +0000212};
213
214unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
215
216#endif /* CONFIG_POST */