Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 2 | /* |
| 3 | * cm_t43.h |
| 4 | * |
| 5 | * Copyright (C) 2015 Compulab, Ltd. |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_CM_T43_H |
| 9 | #define __CONFIG_CM_T43_H |
| 10 | |
Tom Rini | db9c39e | 2022-12-04 10:04:51 -0500 | [diff] [blame] | 11 | #define CFG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 12 | #define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 13 | |
| 14 | #include <asm/arch/omap.h> |
| 15 | |
| 16 | /* Serial support */ |
Tom Rini | df6a215 | 2022-11-16 13:10:28 -0500 | [diff] [blame] | 17 | #define CFG_SYS_NS16550_CLK 48000000 |
| 18 | #define CFG_SYS_NS16550_COM1 0x44e09000 |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 19 | |
| 20 | /* NAND support */ |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 21 | #define CFG_SYS_NAND_ECCSIZE 512 |
| 22 | #define CFG_SYS_NAND_ECCBYTES 14 |
| 23 | #define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 24 | 10, 11, 12, 13, 14, 15, 16, 17, \ |
| 25 | 18, 19, 20, 21, 22, 23, 24, 25, \ |
| 26 | 26, 27, 28, 29, 30, 31, 32, 33, \ |
| 27 | 34, 35, 36, 37, 38, 39, 40, 41, \ |
| 28 | 42, 43, 44, 45, 46, 47, 48, 49, \ |
| 29 | 50, 51, 52, 53, 54, 55, 56, 57, } |
| 30 | |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 31 | /* Enabling L2 Cache */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 32 | #define CFG_SYS_PL310_BASE 0x48242000 |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 33 | |
| 34 | /* |
| 35 | * Since SPL did pll and ddr initialization for us, |
| 36 | * we don't need to do it twice. |
| 37 | */ |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 38 | |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 39 | #include <configs/ti_armv7_omap.h> |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 40 | |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 41 | #define V_OSCK 24000000 /* Clock output from T2 */ |
| 42 | #define V_SCLK (V_OSCK) |
| 43 | |
Tom Rini | c9edebe | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 44 | #define CFG_EXTRA_ENV_SETTINGS \ |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 45 | "loadaddr=0x80200000\0" \ |
| 46 | "fdtaddr=0x81200000\0" \ |
| 47 | "bootm_size=0x8000000\0" \ |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 48 | "console=ttyO0,115200n8\0" \ |
| 49 | "fdtfile=am437x-sb-som-t43.dtb\0" \ |
| 50 | "kernel=zImage-cm-t43\0" \ |
| 51 | "bootscr=bootscr.img\0" \ |
| 52 | "emmcroot=/dev/mmcblk0p2 rw\0" \ |
| 53 | "emmcrootfstype=ext4 rootwait\0" \ |
| 54 | "emmcargs=setenv bootargs console=${console} " \ |
| 55 | "root=${emmcroot} " \ |
| 56 | "rootfstype=${emmcrootfstype}\0" \ |
| 57 | "loadbootscript=load mmc 0 ${loadaddr} ${bootscr}\0" \ |
| 58 | "bootscript=echo Running bootscript from mmc ...; " \ |
| 59 | "source ${loadaddr}\0" \ |
| 60 | "emmcboot=echo Booting from emmc ... && " \ |
| 61 | "run emmcargs && " \ |
| 62 | "load mmc 1 ${loadaddr} ${kernel} && " \ |
| 63 | "load mmc 1 ${fdtaddr} ${fdtfile} && " \ |
| 64 | "bootz ${loadaddr} - ${fdtaddr}\0" |
| 65 | |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 66 | /* SPL defines. */ |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 67 | |
Nikita Kiryanov | 626853f | 2016-04-16 17:55:10 +0300 | [diff] [blame] | 68 | /* EEPROM */ |
Nikita Kiryanov | 626853f | 2016-04-16 17:55:10 +0300 | [diff] [blame] | 69 | |
Nikita Kiryanov | 2b7487c | 2015-07-30 23:56:23 +0300 | [diff] [blame] | 70 | #endif /* __CONFIG_CM_T43_H */ |