blob: 743c8c86922f013335d35ef4159c2da71611287d [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +03002/*
3 * cm_t43.h
4 *
5 * Copyright (C) 2015 Compulab, Ltd.
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +03006 */
7
8#ifndef __CONFIG_CM_T43_H
9#define __CONFIG_CM_T43_H
10
Tom Rinidb9c39e2022-12-04 10:04:51 -050011#define CFG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */
Tom Rini6a5dccc2022-11-16 13:10:41 -050012#define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030013
14#include <asm/arch/omap.h>
15
16/* Serial support */
Tom Rinidf6a2152022-11-16 13:10:28 -050017#define CFG_SYS_NS16550_CLK 48000000
18#define CFG_SYS_NS16550_COM1 0x44e09000
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030019
20/* NAND support */
Tom Rinib4213492022-11-12 17:36:51 -050021#define CFG_SYS_NAND_ECCSIZE 512
22#define CFG_SYS_NAND_ECCBYTES 14
23#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030024 10, 11, 12, 13, 14, 15, 16, 17, \
25 18, 19, 20, 21, 22, 23, 24, 25, \
26 26, 27, 28, 29, 30, 31, 32, 33, \
27 34, 35, 36, 37, 38, 39, 40, 41, \
28 42, 43, 44, 45, 46, 47, 48, 49, \
29 50, 51, 52, 53, 54, 55, 56, 57, }
30
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030031/* Enabling L2 Cache */
Tom Rini6a5dccc2022-11-16 13:10:41 -050032#define CFG_SYS_PL310_BASE 0x48242000
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030033
34/*
35 * Since SPL did pll and ddr initialization for us,
36 * we don't need to do it twice.
37 */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030038
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030039#include <configs/ti_armv7_omap.h>
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030040
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030041#define V_OSCK 24000000 /* Clock output from T2 */
42#define V_SCLK (V_OSCK)
43
Tom Rinic9edebe2022-12-04 10:03:50 -050044#define CFG_EXTRA_ENV_SETTINGS \
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030045 "loadaddr=0x80200000\0" \
46 "fdtaddr=0x81200000\0" \
47 "bootm_size=0x8000000\0" \
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030048 "console=ttyO0,115200n8\0" \
49 "fdtfile=am437x-sb-som-t43.dtb\0" \
50 "kernel=zImage-cm-t43\0" \
51 "bootscr=bootscr.img\0" \
52 "emmcroot=/dev/mmcblk0p2 rw\0" \
53 "emmcrootfstype=ext4 rootwait\0" \
54 "emmcargs=setenv bootargs console=${console} " \
55 "root=${emmcroot} " \
56 "rootfstype=${emmcrootfstype}\0" \
57 "loadbootscript=load mmc 0 ${loadaddr} ${bootscr}\0" \
58 "bootscript=echo Running bootscript from mmc ...; " \
59 "source ${loadaddr}\0" \
60 "emmcboot=echo Booting from emmc ... && " \
61 "run emmcargs && " \
62 "load mmc 1 ${loadaddr} ${kernel} && " \
63 "load mmc 1 ${fdtaddr} ${fdtfile} && " \
64 "bootz ${loadaddr} - ${fdtaddr}\0"
65
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030066/* SPL defines. */
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030067
Nikita Kiryanov626853f2016-04-16 17:55:10 +030068/* EEPROM */
Nikita Kiryanov626853f2016-04-16 17:55:10 +030069
Nikita Kiryanov2b7487c2015-07-30 23:56:23 +030070#endif /* __CONFIG_CM_T43_H */