Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 3f5318f289cc71d1376732a1567fb1ff1ee2e820 / . / board / emulation / qemu-riscv / Kconfig
blob: 0818048ba64f4593498049e28419bc3df8ed91d4 [file] [log] [blame]
Bin Meng8a8694d2018-09-26 06:55:21 -0700[diff] [blame]1if TARGET_QEMU_VIRT
2
3config SYS_BOARD
4 default "qemu-riscv"
5
6config SYS_VENDOR
7 default "emulation"
8
9config SYS_CPU
Anup Patel1240cd62019-02-25 08:14:10 +0000[diff] [blame]10 default "generic"
Bin Meng8a8694d2018-09-26 06:55:21 -0700[diff] [blame]11
12config SYS_CONFIG_NAME
13 default "qemu-riscv"
14
15config SYS_TEXT_BASE
Lukas Auerdf3f1002019-08-21 21:14:49 +0200[diff] [blame]16 default 0x81200000 if SPL
Anup Patelea6a7a02018-12-03 10:57:41 +0530[diff] [blame]17 default 0x80000000 if !RISCV_SMODE
Anup Patel3d7cb7b2019-04-11 06:52:12 +0000[diff] [blame]18 default 0x80200000 if RISCV_SMODE && ARCH_RV64I
19 default 0x80400000 if RISCV_SMODE && ARCH_RV32I
Bin Meng8a8694d2018-09-26 06:55:21 -0700[diff] [blame]20
Lukas Auerdf3f1002019-08-21 21:14:49 +0200[diff] [blame]21config SPL_TEXT_BASE
22 default 0x80000000
23
24config SPL_OPENSBI_LOAD_ADDR
Bin Meng99e54e62019-08-07 23:04:41 -0700[diff] [blame]25 hex
Lukas Auerdf3f1002019-08-21 21:14:49 +0200[diff] [blame]26 default 0x81000000
27
Bin Meng8a8694d2018-09-26 06:55:21 -0700[diff] [blame]28config BOARD_SPECIFIC_OPTIONS # dummy
29 def_bool y
Anup Patel1240cd62019-02-25 08:14:10 +0000[diff] [blame]30 select GENERIC_RISCV
Lukas Auerdf3f1002019-08-21 21:14:49 +0200[diff] [blame]31 select SUPPORT_SPL
Heinrich Schuchardt60585512020-11-04 12:49:01 +0100[diff] [blame]32 imply AHCI
Heinrich Schuchardtd50b4ef2020-11-04 12:49:00 +0100[diff] [blame]33 imply SMP
34 imply BOARD_LATE_INIT
Heinrich Schuchardt60585512020-11-04 12:49:01 +0100[diff] [blame]35 imply PCI_INIT_R
Heinrich Schuchardtd50b4ef2020-11-04 12:49:00 +0100[diff] [blame]36 imply SPL_RAM_SUPPORT
37 imply SPL_RAM_DEVICE
38 imply CMD_PCI
39 imply CMD_POWEROFF
Heinrich Schuchardt60585512020-11-04 12:49:01 +0100[diff] [blame]40 imply CMD_SCSI
Bin Mengf08aa022018-10-15 02:21:14 -0700[diff] [blame]41 imply CMD_PING
Bin Mengf08aa022018-10-15 02:21:14 -0700[diff] [blame]42 imply CMD_EXT2
43 imply CMD_EXT4
44 imply CMD_FAT
Heinrich Schuchardtd50b4ef2020-11-04 12:49:00 +0100[diff] [blame]45 imply CMD_FS_GENERIC
46 imply DOS_PARTITION
47 imply ISO_PARTITION
48 imply EFI_PARTITION
Heinrich Schuchardt60585512020-11-04 12:49:01 +0100[diff] [blame]49 imply SCSI_AHCI
50 imply AHCI_PCI
Heinrich Schuchardtd50b4ef2020-11-04 12:49:00 +0100[diff] [blame]51 imply E1000
52 imply NVME
Bin Mengc5ad8892019-05-15 08:42:58 -0700[diff] [blame]53 imply PCI
54 imply DM_PCI
55 imply PCIE_ECAM_GENERIC
Heinrich Schuchardt60585512020-11-04 12:49:01 +0100[diff] [blame]56 imply SCSI
57 imply DM_SCSI
Heinrich Schuchardtd50b4ef2020-11-04 12:49:00 +0100[diff] [blame]58 imply SYS_NS16550
59 imply SIFIVE_SERIAL
Bin Mengdbe74cd2020-06-22 22:29:45 -0700[diff] [blame]60 imply SYSRESET
Bin Mengdbe74cd2020-06-22 22:29:45 -0700[diff] [blame]61 imply SYSRESET_CMD_POWEROFF
Heinrich Schuchardtd50b4ef2020-11-04 12:49:00 +0100[diff] [blame]62 imply SYSRESET_SYSCON
63 imply VIRTIO_MMIO
64 imply VIRTIO_PCI
65 imply VIRTIO_NET
66 imply VIRTIO_BLK
Bin Meng8a8694d2018-09-26 06:55:21 -0700[diff] [blame]67
68endif