riscv: qemu: add SPL configuration
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL
enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The
configurations are meant to help the development of SPL on RISC-V.
The configurations enable RAM as the only SPL boot device. Images must
be loaded at address 0x80200000. In the default boot flow, U-Boot SPL
starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot
proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is
then started in supervisor mode by OpenSBI.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig
index 6cc7c31..1928d6d 100644
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -13,13 +13,21 @@
default "qemu-riscv"
config SYS_TEXT_BASE
+ default 0x81200000 if SPL
default 0x80000000 if !RISCV_SMODE
default 0x80200000 if RISCV_SMODE && ARCH_RV64I
default 0x80400000 if RISCV_SMODE && ARCH_RV32I
+config SPL_TEXT_BASE
+ default 0x80000000
+
+config SPL_OPENSBI_LOAD_ADDR
+ default 0x81000000
+
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select GENERIC_RISCV
+ select SUPPORT_SPL
imply SYS_NS16550
imply VIRTIO_MMIO
imply VIRTIO_NET
@@ -43,5 +51,7 @@
imply CMD_PCI
imply E1000
imply NVME
+ imply SPL_RAM_SUPPORT
+ imply SPL_RAM_DEVICE
endif