| Apurva Nandan | 67ebc30 | 2024-02-24 01:51:41 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | */ |
| 5 | |
| 6 | #ifndef _ASM_ARCH_J784S4_SPL_H_ |
| 7 | #define _ASM_ARCH_J784S4_SPL_H_ |
| 8 | |
| 9 | /* With BootMode B = 0 */ |
| 10 | #include <linux/bitops.h> |
| 11 | |
| 12 | #define BOOT_DEVICE_HYPERFLASH 0x00 |
| 13 | #define BOOT_DEVICE_OSPI 0x01 |
| 14 | #define BOOT_DEVICE_QSPI 0x02 |
| 15 | #define BOOT_DEVICE_SPI 0x03 |
| 16 | #define BOOT_DEVICE_ETHERNET 0x04 |
| 17 | #define BOOT_DEVICE_I2C 0x06 |
| 18 | #define BOOT_DEVICE_UART 0x07 |
| 19 | #define BOOT_DEVICE_NOR BOOT_DEVICE_HYPERFLASH |
| 20 | |
| 21 | /* With BootMode B = 1 */ |
| 22 | #define BOOT_DEVICE_MMC2 0x10 |
| 23 | #define BOOT_DEVICE_MMC1 0x11 |
| 24 | #define BOOT_DEVICE_DFU 0x12 |
| 25 | #define BOOT_DEVICE_UFS 0x13 |
| 26 | #define BOOT_DEVIE_GPMC 0x14 |
| 27 | #define BOOT_DEVICE_PCIE 0x15 |
| 28 | #define BOOT_DEVICE_XSPI 0x16 |
| 29 | #define BOOT_DEVICE_RAM 0x17 |
| 30 | #define BOOT_DEVICE_MMC2_2 0xFF /* Invalid value */ |
| 31 | |
| 32 | /* Backup boot modes with MCU Only = 0 */ |
| 33 | #define BACKUP_BOOT_DEVICE_RAM 0x0 |
| 34 | #define BACKUP_BOOT_DEVICE_USB 0x1 |
| 35 | #define BACKUP_BOOT_DEVICE_UART 0x3 |
| 36 | #define BACKUP_BOOT_DEVICE_ETHERNET 0x4 |
| 37 | #define BACKUP_BOOT_DEVICE_MMC2 0x5 |
| 38 | #define BACKUP_BOOT_DEVICE_SPI 0x6 |
| 39 | #define BACKUP_BOOT_DEVICE_I2C 0x7 |
| 40 | |
| 41 | #define BOOT_MODE_B_SHIFT 4 |
| 42 | #define BOOT_MODE_B_MASK BIT(4) |
| 43 | |
| 44 | #define K3_PRIMARY_BOOTMODE 0x0 |
| 45 | #define K3_BACKUP_BOOTMODE 0x1 |
| 46 | |
| 47 | #endif |