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git01.mediatek.com / filogic / uboot / 3e174808f513e3e10f3e460c24677cbab5dfdd36 / . / test / dm / reset.c
blob: fc8e9250b0d068e703a120ebffed659fe8ecb7c0 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]2/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]4 */
5
6#include <common.h>
7#include <dm.h>
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]8#include <dm/device-internal.h>
Simon Glass0f2af882020-05-10 11:40:05 -0600[diff] [blame]9#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -0700[diff] [blame]10#include <malloc.h>
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]11#include <reset.h>
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]12#include <dm/test.h>
13#include <asm/reset.h>
Simon Glass75c4d412020-07-19 10:15:37 -0600[diff] [blame]14#include <test/test.h>
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]15#include <test/ut.h>
16
17/* This must match the specifier for mbox-names="test" in the DT node */
18#define TEST_RESET_ID 2
19
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]20/* This is the other reset phandle specifier handled by bulk */
21#define OTHER_RESET_ID 2
22
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]23/* Base test of the reset uclass */
24static int dm_test_reset_base(struct unit_test_state *uts)
25{
26 struct udevice *dev;
27 struct reset_ctl reset_method1;
28 struct reset_ctl reset_method2;
29
30 /* Get the device using the reset device */
31 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
32 &dev));
33
34 /* Get the same reset port in 2 different ways and compare */
35 ut_assertok(reset_get_by_index(dev, 1, &reset_method1));
36 ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 1,
37 &reset_method2));
38 ut_asserteq(reset_method1.id, reset_method2.id);
39
40 return 0;
41}
42
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]43DM_TEST(dm_test_reset_base, UT_TESTF_SCAN_FDT);
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]44
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]45static int dm_test_reset(struct unit_test_state *uts)
46{
47 struct udevice *dev_reset;
48 struct udevice *dev_test;
49
50 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
51 &dev_reset));
52 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
53
54 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
55 &dev_test));
56 ut_assertok(sandbox_reset_test_get(dev_test));
57
58 ut_assertok(sandbox_reset_test_assert(dev_test));
59 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
60
61 ut_assertok(sandbox_reset_test_deassert(dev_test));
62 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
63
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]64 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]65 ut_assertok(sandbox_reset_test_free(dev_test));
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]66 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]67
68 return 0;
69}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]70DM_TEST(dm_test_reset, UT_TESTF_SCAN_FDT);
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]71
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]72static int dm_test_reset_devm(struct unit_test_state *uts)
73{
74 struct udevice *dev_reset;
75 struct udevice *dev_test;
76
77 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
78 &dev_reset));
79 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
80 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
81 &dev_test));
82 ut_assertok(sandbox_reset_test_get_devm(dev_test));
83
84 ut_assertok(sandbox_reset_test_assert(dev_test));
85 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
86 ut_assertok(sandbox_reset_test_deassert(dev_test));
87 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
88
89 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
90 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
91 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
92
93 return 0;
94}
95DM_TEST(dm_test_reset_devm, UT_TESTF_SCAN_FDT);
96
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]97static int dm_test_reset_bulk(struct unit_test_state *uts)
98{
99 struct udevice *dev_reset;
100 struct udevice *dev_test;
101
102 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
103 &dev_reset));
104 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
105 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
106
107 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
108 &dev_test));
109 ut_assertok(sandbox_reset_test_get_bulk(dev_test));
110
111 ut_assertok(sandbox_reset_test_assert_bulk(dev_test));
112 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
113 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
114
115 ut_assertok(sandbox_reset_test_deassert_bulk(dev_test));
116 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
117 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
118
119 ut_assertok(sandbox_reset_test_release_bulk(dev_test));
120 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
121 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
122
123 return 0;
124}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]125DM_TEST(dm_test_reset_bulk, UT_TESTF_SCAN_FDT);
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]126
127static int dm_test_reset_bulk_devm(struct unit_test_state *uts)
128{
129 struct udevice *dev_reset;
130 struct udevice *dev_test;
131
132 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
133 &dev_reset));
134 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
135 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
136
137 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
138 &dev_test));
139 ut_assertok(sandbox_reset_test_get_bulk_devm(dev_test));
140
141 ut_assertok(sandbox_reset_test_assert_bulk(dev_test));
142 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
143 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
144
145 ut_assertok(sandbox_reset_test_deassert_bulk(dev_test));
146 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
147 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
148
149 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, OTHER_RESET_ID));
150 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
151 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
152 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
153 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, OTHER_RESET_ID));
154
155 return 0;
156}
157DM_TEST(dm_test_reset_bulk_devm, UT_TESTF_SCAN_FDT);