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David Feng3b5458c2013-12-14 11:47:37 +08001/*
2 * Configuration for Versatile Express. Parts were derived from other ARM
3 * configurations.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __VEXPRESS_AEMV8A_H
9#define __VEXPRESS_AEMV8A_H
10
Linus Walleij31e476e2015-04-14 10:01:35 +020011/* We use generic board and device manager for v8 Versatile Express */
Linus Walleijbe8a44d2014-12-24 02:02:46 +010012#define CONFIG_SYS_GENERIC_BOARD
13
Linus Walleij800d6fd2015-01-23 11:50:53 +010014#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
Darwin Rambod32d4112014-06-09 11:12:59 -070015#ifndef CONFIG_SEMIHOSTING
Linus Walleij800d6fd2015-01-23 11:50:53 +010016#error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
Darwin Rambod32d4112014-06-09 11:12:59 -070017#endif
Darwin Rambod32d4112014-06-09 11:12:59 -070018#define CONFIG_ARMV8_SWITCH_TO_EL1
19#endif
20
David Feng3b5458c2013-12-14 11:47:37 +080021#define CONFIG_REMAKE_ELF
22
David Feng3b5458c2013-12-14 11:47:37 +080023#define CONFIG_SUPPORT_RAW_INITRD
24
25/* Cache Definitions */
26#define CONFIG_SYS_DCACHE_OFF
27#define CONFIG_SYS_ICACHE_OFF
28
29#define CONFIG_IDENT_STRING " vexpress_aemv8a"
30#define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a"
31
32/* Link Definitions */
Linus Walleij800d6fd2015-01-23 11:50:53 +010033#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
Darwin Rambod32d4112014-06-09 11:12:59 -070034/* ATF loads u-boot here for BASE_FVP model */
35#define CONFIG_SYS_TEXT_BASE 0x88000000
36#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
Linus Walleijc5822502015-01-23 14:41:10 +010037#elif CONFIG_TARGET_VEXPRESS64_JUNO
38#define CONFIG_SYS_TEXT_BASE 0xe0000000
39#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
Darwin Rambod32d4112014-06-09 11:12:59 -070040#else
Linus Walleija90caa32015-03-23 11:06:14 +010041#error "Unknown board variant"
Darwin Rambod32d4112014-06-09 11:12:59 -070042#endif
David Feng3b5458c2013-12-14 11:47:37 +080043
44/* Flat Device Tree Definitions */
45#define CONFIG_OF_LIBFDT
46
David Feng3b5458c2013-12-14 11:47:37 +080047/* CS register bases for the original memory map. */
48#define V2M_PA_CS0 0x00000000
49#define V2M_PA_CS1 0x14000000
50#define V2M_PA_CS2 0x18000000
51#define V2M_PA_CS3 0x1c000000
52#define V2M_PA_CS4 0x0c000000
53#define V2M_PA_CS5 0x10000000
54
55#define V2M_PERIPH_OFFSET(x) (x << 16)
56#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
57#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
58#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
59
60#define V2M_BASE 0x80000000
61
David Feng3b5458c2013-12-14 11:47:37 +080062/* Common peripherals relative to CS7. */
63#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
64#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
65#define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
66#define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
67
Linus Walleijc5822502015-01-23 14:41:10 +010068#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
69#define V2M_UART0 0x7ff80000
70#define V2M_UART1 0x7ff70000
71#else /* Not Juno */
David Feng3b5458c2013-12-14 11:47:37 +080072#define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
73#define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
74#define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
75#define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
Linus Walleijc5822502015-01-23 14:41:10 +010076#endif
David Feng3b5458c2013-12-14 11:47:37 +080077
78#define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
79
80#define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
81#define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
82
83#define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
84#define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
85
86#define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
87
88#define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
89
90/* System register offsets. */
91#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
92#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
93#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
94
95/* Generic Timer Definitions */
96#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
97
98/* Generic Interrupt Controller Definitions */
David Feng79bbde02014-03-14 14:26:27 +080099#ifdef CONFIG_GICV3
100#define GICD_BASE (0x2f000000)
101#define GICR_BASE (0x2f100000)
102#else
Darwin Rambod32d4112014-06-09 11:12:59 -0700103
Linus Walleij800d6fd2015-01-23 11:50:53 +0100104#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
Darwin Rambod32d4112014-06-09 11:12:59 -0700105#define GICD_BASE (0x2f000000)
106#define GICC_BASE (0x2c000000)
Linus Walleijc5822502015-01-23 14:41:10 +0100107#elif CONFIG_TARGET_VEXPRESS64_JUNO
108#define GICD_BASE (0x2C010000)
109#define GICC_BASE (0x2C02f000)
Darwin Rambod32d4112014-06-09 11:12:59 -0700110#else
Linus Walleija90caa32015-03-23 11:06:14 +0100111#error "Unknown board variant"
David Feng79bbde02014-03-14 14:26:27 +0800112#endif
Linus Walleija90caa32015-03-23 11:06:14 +0100113#endif /* !CONFIG_GICV3 */
David Feng3b5458c2013-12-14 11:47:37 +0800114
David Feng3b5458c2013-12-14 11:47:37 +0800115/* Size of malloc() pool */
Tom Rini7e76aa42014-08-14 06:42:37 -0400116#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
David Feng3b5458c2013-12-14 11:47:37 +0800117
Linus Walleij48b47552015-02-17 11:35:25 +0100118/* Ethernet Configuration */
119#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
120/* The real hardware Versatile express uses SMSC9118 */
121#define CONFIG_SMC911X 1
122#define CONFIG_SMC911X_32_BIT 1
123#define CONFIG_SMC911X_BASE (0x018000000)
124#else
125/* The Vexpress64 simulators use SMSC91C111 */
Bhupesh Sharmae997f352014-01-16 09:47:40 -0600126#define CONFIG_SMC91111 1
127#define CONFIG_SMC91111_BASE (0x01A000000)
Linus Walleij48b47552015-02-17 11:35:25 +0100128#endif
David Feng3b5458c2013-12-14 11:47:37 +0800129
130/* PL011 Serial Configuration */
Linus Walleij31e476e2015-04-14 10:01:35 +0200131#define CONFIG_BAUDRATE 115200
David Fengab33c2c2015-01-31 11:55:29 +0800132#define CONFIG_CONS_INDEX 0
Linus Walleij31e476e2015-04-14 10:01:35 +0200133#define CONFIG_PL01X_SERIAL
David Feng3b5458c2013-12-14 11:47:37 +0800134#define CONFIG_PL011_SERIAL
Linus Walleijc5822502015-01-23 14:41:10 +0100135#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
136#define CONFIG_PL011_CLOCK 7273800
137#else
David Feng3b5458c2013-12-14 11:47:37 +0800138#define CONFIG_PL011_CLOCK 24000000
Linus Walleijc5822502015-01-23 14:41:10 +0100139#endif
David Feng3b5458c2013-12-14 11:47:37 +0800140
141/* Command line configuration */
142#define CONFIG_MENU
143/*#define CONFIG_MENU_SHOW*/
144#define CONFIG_CMD_CACHE
Tom Rini9557a4a2014-08-14 06:42:38 -0400145#define CONFIG_CMD_BOOTI
146#define CONFIG_CMD_UNZIP
David Feng3b5458c2013-12-14 11:47:37 +0800147#define CONFIG_CMD_DHCP
148#define CONFIG_CMD_PXE
149#define CONFIG_CMD_ENV
David Feng3b5458c2013-12-14 11:47:37 +0800150#define CONFIG_CMD_MII
David Feng3b5458c2013-12-14 11:47:37 +0800151#define CONFIG_CMD_PING
David Feng3b5458c2013-12-14 11:47:37 +0800152#define CONFIG_CMD_FAT
153#define CONFIG_DOS_PARTITION
154
155/* BOOTP options */
156#define CONFIG_BOOTP_BOOTFILESIZE
157#define CONFIG_BOOTP_BOOTPATH
158#define CONFIG_BOOTP_GATEWAY
159#define CONFIG_BOOTP_HOSTNAME
160#define CONFIG_BOOTP_PXE
161#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
162
163/* Miscellaneous configurable options */
164#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
165
166/* Physical Memory Map */
167#define CONFIG_NR_DRAM_BANKS 1
168#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
Linus Walleij0a38bfe2015-05-11 10:03:57 +0200169/* Top 16MB reserved for secure world use */
170#define DRAM_SEC_SIZE 0x01000000
171#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
172#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
173
174/* Enable memtest */
175#define CONFIG_CMD_MEMTEST
176#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
177#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
David Feng3b5458c2013-12-14 11:47:37 +0800178
179/* Initial environment variables */
Linus Walleijc39566a2015-04-05 01:48:32 +0200180#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
181/*
182 * Defines where the kernel and FDT exist in NOR flash and where it will
183 * be copied into DRAM
184 */
185#define CONFIG_EXTRA_ENV_SETTINGS \
186 "kernel_name=Image\0" \
187 "kernel_addr=0x80000000\0" \
188 "fdt_name=juno\0" \
189 "fdt_addr=0x83000000\0" \
190 "fdt_high=0xffffffffffffffff\0" \
191 "initrd_high=0xffffffffffffffff\0" \
192
193/* Assume we boot with root on the first partition of a USB stick */
194#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \
195 "root=/dev/sda1 rw " \
Linus Walleij77e36f72015-05-14 17:38:33 +0200196 "rootwait "\
Linus Walleijc39566a2015-04-05 01:48:32 +0200197 "earlyprintk=pl011,0x7ff80000 debug user_debug=31 "\
198 "loglevel=9"
199
200/* Copy the kernel and FDT to DRAM memory and boot */
201#define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \
202 "afs load ${fdt_name} ${fdt_addr} ; " \
203 "fdt addr ${fdt_addr}; fdt resize; " \
204 "booti ${kernel_addr} - ${fdt_addr}"
205
206#define CONFIG_BOOTDELAY 1
207
208#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
Darwin Rambod32d4112014-06-09 11:12:59 -0700209#define CONFIG_EXTRA_ENV_SETTINGS \
Linus Walleij4d30c9d2015-05-27 09:45:39 +0200210 "kernel_name=Image\0" \
Linus Walleije08177c2015-03-23 11:06:12 +0100211 "kernel_addr=0x80000000\0" \
Darwin Rambod32d4112014-06-09 11:12:59 -0700212 "initrd_name=ramdisk.img\0" \
Linus Walleije08177c2015-03-23 11:06:12 +0100213 "initrd_addr=0x88000000\0" \
214 "fdt_name=devtree.dtb\0" \
215 "fdt_addr=0x83000000\0" \
Darwin Rambod32d4112014-06-09 11:12:59 -0700216 "fdt_high=0xffffffffffffffff\0" \
217 "initrd_high=0xffffffffffffffff\0"
218
219#define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
220 "0x1c090000 debug user_debug=31 "\
221 "loglevel=9"
222
Linus Walleije08177c2015-03-23 11:06:12 +0100223#define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
Linus Walleij4d30c9d2015-05-27 09:45:39 +0200224 "smhload ${fdt_name} ${fdt_addr}; " \
225 "smhload ${initrd_name} ${initrd_addr} initrd_end; " \
226 "fdt addr ${fdt_addr}; fdt resize; " \
227 "fdt chosen ${initrd_addr} ${initrd_end}; " \
228 "booti $kernel_addr - $fdt_addr"
Darwin Rambod32d4112014-06-09 11:12:59 -0700229
230#define CONFIG_BOOTDELAY 1
231
232#else
Linus Walleija90caa32015-03-23 11:06:14 +0100233#error "Unknown board variant"
Darwin Rambod32d4112014-06-09 11:12:59 -0700234#endif
David Feng3b5458c2013-12-14 11:47:37 +0800235
236/* Do not preserve environment */
237#define CONFIG_ENV_IS_NOWHERE 1
238#define CONFIG_ENV_SIZE 0x1000
239
240/* Monitor Command Prompt */
241#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
David Feng3b5458c2013-12-14 11:47:37 +0800242#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
243 sizeof(CONFIG_SYS_PROMPT) + 16)
244#define CONFIG_SYS_HUSH_PARSER
David Feng3b5458c2013-12-14 11:47:37 +0800245#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
246#define CONFIG_SYS_LONGHELP
Tom Rini7e76aa42014-08-14 06:42:37 -0400247#define CONFIG_CMDLINE_EDITING
David Feng3b5458c2013-12-14 11:47:37 +0800248#define CONFIG_SYS_MAXARGS 64 /* max command args */
249
Linus Walleij6ba4b6a2015-02-19 17:19:37 +0100250/* Flash memory is available on the Juno board only */
251#ifndef CONFIG_TARGET_VEXPRESS64_JUNO
252#define CONFIG_SYS_NO_FLASH
253#else
Linus Walleijc39566a2015-04-05 01:48:32 +0200254#define CONFIG_CMD_ARMFLASH
Linus Walleij6ba4b6a2015-02-19 17:19:37 +0100255#define CONFIG_SYS_FLASH_CFI 1
256#define CONFIG_FLASH_CFI_DRIVER 1
Ryan Harkinb1a4a672015-05-08 18:07:52 +0100257#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
Linus Walleij6ba4b6a2015-02-19 17:19:37 +0100258#define CONFIG_SYS_FLASH_BASE 0x08000000
259#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MiB */
260#define CONFIG_SYS_MAX_FLASH_BANKS 2
261
262/* Timeout values in ticks */
263#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
264#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
265
266/* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
267#define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */
268#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
269#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
270#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
271
272#endif
273
David Feng3b5458c2013-12-14 11:47:37 +0800274#endif /* __VEXPRESS_AEMV8A_H */