Andre Przywara | 8780ada | 2023-10-19 15:51:39 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2020 Arm Ltd. |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
Andre Przywara | 8780ada | 2023-10-19 15:51:39 +0100 | [diff] [blame] | 8 | #include "sun50i-h616-orangepi-zero.dtsi" |
Andre Przywara | 3b79821 | 2024-04-19 17:59:52 +0100 | [diff] [blame^] | 9 | #include "sun50i-h616-cpu-opp.dtsi" |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 10 | |
| 11 | / { |
| 12 | model = "OrangePi Zero2"; |
| 13 | compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 14 | }; |
| 15 | |
Andre Przywara | 3b79821 | 2024-04-19 17:59:52 +0100 | [diff] [blame^] | 16 | &cpu0 { |
| 17 | cpu-supply = <®_dcdca>; |
| 18 | }; |
| 19 | |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 20 | &emac0 { |
Chukun Pan | cedb125 | 2023-10-29 15:40:09 +0800 | [diff] [blame] | 21 | allwinner,rx-delay-ps = <3100>; |
| 22 | allwinner,tx-delay-ps = <700>; |
| 23 | phy-mode = "rgmii"; |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 24 | phy-supply = <®_dcdce>; |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 25 | }; |
| 26 | |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 27 | &mmc0 { |
| 28 | vmmc-supply = <®_dcdce>; |
Andre Przywara | ed2724b | 2023-01-12 11:22:20 +0000 | [diff] [blame] | 29 | }; |
| 30 | |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 31 | &r_rsb { |
| 32 | status = "okay"; |
| 33 | |
| 34 | axp305: pmic@745 { |
| 35 | compatible = "x-powers,axp305", "x-powers,axp805", |
| 36 | "x-powers,axp806"; |
| 37 | interrupt-controller; |
| 38 | #interrupt-cells = <1>; |
| 39 | reg = <0x745>; |
| 40 | |
| 41 | x-powers,self-working-mode; |
| 42 | vina-supply = <®_vcc5v>; |
| 43 | vinb-supply = <®_vcc5v>; |
| 44 | vinc-supply = <®_vcc5v>; |
| 45 | vind-supply = <®_vcc5v>; |
| 46 | vine-supply = <®_vcc5v>; |
| 47 | aldoin-supply = <®_vcc5v>; |
| 48 | bldoin-supply = <®_vcc5v>; |
| 49 | cldoin-supply = <®_vcc5v>; |
| 50 | |
| 51 | regulators { |
| 52 | reg_aldo1: aldo1 { |
| 53 | regulator-always-on; |
| 54 | regulator-min-microvolt = <3300000>; |
| 55 | regulator-max-microvolt = <3300000>; |
| 56 | regulator-name = "vcc-sys"; |
| 57 | }; |
| 58 | |
| 59 | reg_aldo2: aldo2 { /* 3.3V on headers */ |
| 60 | regulator-always-on; |
| 61 | regulator-min-microvolt = <3300000>; |
| 62 | regulator-max-microvolt = <3300000>; |
| 63 | regulator-name = "vcc3v3-ext"; |
| 64 | }; |
| 65 | |
| 66 | reg_aldo3: aldo3 { /* 3.3V on headers */ |
| 67 | regulator-always-on; |
| 68 | regulator-min-microvolt = <3300000>; |
| 69 | regulator-max-microvolt = <3300000>; |
| 70 | regulator-name = "vcc3v3-ext2"; |
| 71 | }; |
| 72 | |
| 73 | reg_bldo1: bldo1 { |
| 74 | regulator-always-on; |
| 75 | regulator-min-microvolt = <1800000>; |
| 76 | regulator-max-microvolt = <1800000>; |
| 77 | regulator-name = "vcc1v8"; |
| 78 | }; |
| 79 | |
| 80 | bldo2 { |
| 81 | /* unused */ |
| 82 | }; |
| 83 | |
| 84 | bldo3 { |
| 85 | /* unused */ |
| 86 | }; |
| 87 | |
| 88 | bldo4 { |
| 89 | /* unused */ |
| 90 | }; |
| 91 | |
| 92 | cldo1 { |
| 93 | /* reserved */ |
| 94 | }; |
| 95 | |
| 96 | cldo2 { |
| 97 | /* unused */ |
| 98 | }; |
| 99 | |
| 100 | cldo3 { |
| 101 | /* unused */ |
| 102 | }; |
| 103 | |
| 104 | reg_dcdca: dcdca { |
| 105 | regulator-always-on; |
| 106 | regulator-min-microvolt = <810000>; |
Andre Przywara | 5eb4bbe | 2022-09-11 00:04:41 +0100 | [diff] [blame] | 107 | regulator-max-microvolt = <1100000>; |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 108 | regulator-name = "vdd-cpu"; |
| 109 | }; |
| 110 | |
| 111 | reg_dcdcc: dcdcc { |
| 112 | regulator-always-on; |
| 113 | regulator-min-microvolt = <810000>; |
Andre Przywara | 5eb4bbe | 2022-09-11 00:04:41 +0100 | [diff] [blame] | 114 | regulator-max-microvolt = <990000>; |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 115 | regulator-name = "vdd-gpu-sys"; |
| 116 | }; |
| 117 | |
| 118 | reg_dcdcd: dcdcd { |
| 119 | regulator-always-on; |
| 120 | regulator-min-microvolt = <1500000>; |
| 121 | regulator-max-microvolt = <1500000>; |
| 122 | regulator-name = "vdd-dram"; |
| 123 | }; |
| 124 | |
| 125 | reg_dcdce: dcdce { |
Andre Przywara | 5eb4bbe | 2022-09-11 00:04:41 +0100 | [diff] [blame] | 126 | regulator-always-on; |
Jernej Skrabec | e4e040c | 2021-01-11 21:11:53 +0100 | [diff] [blame] | 127 | regulator-min-microvolt = <3300000>; |
| 128 | regulator-max-microvolt = <3300000>; |
| 129 | regulator-name = "vcc-eth-mmc"; |
| 130 | }; |
| 131 | |
| 132 | sw { |
| 133 | /* unused */ |
| 134 | }; |
| 135 | }; |
| 136 | }; |
| 137 | }; |
| 138 | |
Andre Przywara | 5eb4bbe | 2022-09-11 00:04:41 +0100 | [diff] [blame] | 139 | &pio { |
| 140 | vcc-pc-supply = <®_aldo1>; |
| 141 | vcc-pf-supply = <®_aldo1>; |
| 142 | vcc-pg-supply = <®_bldo1>; |
| 143 | vcc-ph-supply = <®_aldo1>; |
| 144 | vcc-pi-supply = <®_aldo1>; |
| 145 | }; |