blob: dad571147037e9a5623d6fe83464a4e91ea35bf3 [file] [log] [blame]
Adam Ford42efb612017-08-07 17:37:18 -04001
2menuconfig NAND
3 bool "NAND Device Support"
4if NAND
Masahiro Yamadac343b382014-10-03 19:21:03 +09005
Masahiro Yamadada0763d2014-11-13 20:31:50 +09006config SYS_NAND_SELF_INIT
7 bool
8 help
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
11
Masahiro Yamadac343b382014-10-03 19:21:03 +090012config NAND_DENALI
Masahiro Yamadad81d60b2017-12-06 13:51:50 +090013 bool
Masahiro Yamadada0763d2014-11-13 20:31:50 +090014 select SYS_NAND_SELF_INIT
Tom Rini00448d22017-07-28 21:31:42 -040015 imply CMD_NAND
Masahiro Yamadac343b382014-10-03 19:21:03 +090016
Masahiro Yamada9c5a5dd2017-08-26 01:12:31 +090017config NAND_DENALI_DT
18 bool "Support Denali NAND controller as a DT device"
Masahiro Yamadad81d60b2017-12-06 13:51:50 +090019 select NAND_DENALI
20 depends on OF_CONTROL && DM
Masahiro Yamada9c5a5dd2017-08-26 01:12:31 +090021 help
22 Enable the driver for NAND flash on platforms using a Denali NAND
23 controller as a DT device.
24
Masahiro Yamadac343b382014-10-03 19:21:03 +090025config NAND_DENALI_SPARE_AREA_SKIP_BYTES
26 int "Number of bytes skipped in OOB area"
27 depends on NAND_DENALI
28 range 0 63
29 help
30 This option specifies the number of bytes to skip from the beginning
31 of OOB area before last ECC sector data starts. This is potentially
32 used to preserve the bad block marker in the OOB area.
33
Adam Ford3aee1812018-07-08 06:18:48 -050034config NAND_LPC32XX_SLC
35 bool "Support LPC32XX_SLC controller"
36 help
37 Enable the LPC32XX SLC NAND controller.
38
Adam Ford5b7c9f02017-10-16 14:08:26 -050039config NAND_OMAP_GPMC
40 bool "Support OMAP GPMC NAND controller"
41 depends on ARCH_OMAP2PLUS
42 help
43 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
44 GPMC controller is used for parallel NAND flash devices, and can
45 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
46 and BCH16 ECC algorithms.
47
48config NAND_OMAP_GPMC_PREFETCH
49 bool "Enable GPMC Prefetch"
50 depends on NAND_OMAP_GPMC
Tom Rini848d2672017-10-20 16:55:51 -040051 default y
Adam Ford5b7c9f02017-10-16 14:08:26 -050052 help
53 On OMAP platforms that use the GPMC controller
54 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
55 uses the prefetch mode to speed up read operations.
56
57config NAND_OMAP_ELM
58 bool "Enable ELM driver for OMAPxx and AMxx platforms."
59 depends on NAND_OMAP_GPMC && !OMAP34XX
60 help
61 ELM controller is used for ECC error detection (not ECC calculation)
62 of BCH4, BCH8 and BCH16 ECC algorithms.
63 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
64 thus such SoC platforms need to depend on software library for ECC error
65 detection. However ECC calculation on such plaforms would still be
66 done by GPMC controller.
67
Stefan Agner6120f752015-05-08 19:07:11 +020068config NAND_VF610_NFC
Heiko Schocher6f90e582017-06-14 05:49:40 +020069 bool "Support for Freescale NFC for VF610"
Stefan Agner6120f752015-05-08 19:07:11 +020070 select SYS_NAND_SELF_INIT
Tom Rini00448d22017-07-28 21:31:42 -040071 imply CMD_NAND
Stefan Agner6120f752015-05-08 19:07:11 +020072 help
73 Enables support for NAND Flash Controller on some Freescale
Heiko Schocher6f90e582017-06-14 05:49:40 +020074 processors like the VF610, MCF54418 or Kinetis K70.
Stefan Agner6120f752015-05-08 19:07:11 +020075 The driver supports a maximum 2k page size. The driver
76 currently does not support hardware ECC.
77
Stefan Agnerfe10d3f2015-05-08 19:07:12 +020078choice
79 prompt "Hardware ECC strength"
80 depends on NAND_VF610_NFC
81 default SYS_NAND_VF610_NFC_45_ECC_BYTES
82 help
83 Select the ECC strength used in the hardware BCH ECC block.
84
85config SYS_NAND_VF610_NFC_45_ECC_BYTES
86 bool "24-error correction (45 ECC bytes)"
87
88config SYS_NAND_VF610_NFC_60_ECC_BYTES
89 bool "32-error correction (60 ECC bytes)"
90
91endchoice
92
Stefan Roese75659da2015-07-23 10:26:16 +020093config NAND_PXA3XX
94 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
95 select SYS_NAND_SELF_INIT
Tom Rini00448d22017-07-28 21:31:42 -040096 imply CMD_NAND
Stefan Roese75659da2015-07-23 10:26:16 +020097 help
98 This enables the driver for the NAND flash device found on
99 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
100
Hans de Goede3ce35f92015-08-16 14:48:22 +0200101config NAND_SUNXI
Boris Brezillon57f20382016-06-15 21:09:23 +0200102 bool "Support for NAND on Allwinner SoCs"
Miquel Raynal38b8a982018-02-28 20:52:00 +0100103 default ARCH_SUNXI
Miquel Raynal78f10992018-02-28 20:51:57 +0100104 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
Hans de Goede3ce35f92015-08-16 14:48:22 +0200105 select SYS_NAND_SELF_INIT
Maxime Ripard2d3100c2017-02-27 18:22:08 +0100106 select SYS_NAND_U_BOOT_LOCATIONS
Miquel Raynal9f23e002018-02-28 20:51:59 +0100107 select SPL_NAND_SUPPORT
Tom Rini00448d22017-07-28 21:31:42 -0400108 imply CMD_NAND
Hans de Goede3ce35f92015-08-16 14:48:22 +0200109 ---help---
Boris Brezillon57f20382016-06-15 21:09:23 +0200110 Enable support for NAND. This option enables the standard and
111 SPL drivers.
112 The SPL driver only supports reading from the NAND using DMA
113 transfers.
Hans de Goede3ce35f92015-08-16 14:48:22 +0200114
Maxime Ripardfcacc702017-02-27 18:22:12 +0100115if NAND_SUNXI
116
117config NAND_SUNXI_SPL_ECC_STRENGTH
118 int "Allwinner NAND SPL ECC Strength"
119 default 64
120
121config NAND_SUNXI_SPL_ECC_SIZE
122 int "Allwinner NAND SPL ECC Step Size"
123 default 1024
124
125config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
126 int "Allwinner NAND SPL Usable Page Size"
127 default 1024
128
129endif
130
Siva Durga Prasad Paladugu937ad762015-11-17 14:30:09 +0530131config NAND_ARASAN
132 bool "Configure Arasan Nand"
Ezequiel Garcia18a702e2018-01-15 12:48:12 -0300133 select SYS_NAND_SELF_INIT
Tom Rini00448d22017-07-28 21:31:42 -0400134 imply CMD_NAND
Siva Durga Prasad Paladugu937ad762015-11-17 14:30:09 +0530135 help
136 This enables Nand driver support for Arasan nand flash
137 controller. This uses the hardware ECC for read and
138 write operations.
139
Adam Ford5b7c9f02017-10-16 14:08:26 -0500140config NAND_MXC
141 bool "MXC NAND support"
142 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
143 imply CMD_NAND
144 help
145 This enables the NAND driver for the NAND flash controller on the
146 i.MX27 / i.MX31 / i.MX5 rocessors.
147
Jagan Teki811a8222016-10-08 18:00:25 +0530148config NAND_MXS
149 bool "MXS NAND support"
Stefan Agner3b209fc2018-02-06 09:44:37 +0100150 depends on MX23 || MX28 || MX6 || MX7
Stefan Agner5883e552018-06-22 17:19:47 +0200151 select SYS_NAND_SELF_INIT
Tom Rini00448d22017-07-28 21:31:42 -0400152 imply CMD_NAND
Adam Forda456d562018-02-06 08:34:45 -0600153 select APBH_DMA
154 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
155 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
Jagan Teki811a8222016-10-08 18:00:25 +0530156 help
157 This enables NAND driver for the NAND flash controller on the
158 MXS processors.
159
Stefan Agner4d42ac12018-06-22 17:19:51 +0200160if NAND_MXS
161
Stefan Agner150ddbc2018-06-22 18:06:17 +0200162config NAND_MXS_DT
163 bool "Support MXS NAND controller as a DT device"
164 depends on OF_CONTROL && MTD
165 help
166 Enable the driver for MXS NAND flash on platforms using
167 device tree.
168
Stefan Agner4d42ac12018-06-22 17:19:51 +0200169config NAND_MXS_USE_MINIMUM_ECC
170 bool "Use minimum ECC strength supported by the controller"
171 default false
172
173endif
174
Siva Durga Prasad Paladuguc41d5cd2016-09-27 10:55:46 +0530175config NAND_ZYNQ
176 bool "Support for Zynq Nand controller"
177 select SYS_NAND_SELF_INIT
Tom Rini00448d22017-07-28 21:31:42 -0400178 imply CMD_NAND
Siva Durga Prasad Paladuguc41d5cd2016-09-27 10:55:46 +0530179 help
180 This enables Nand driver support for Nand flash controller
181 found on Zynq SoC.
182
Jeff Westfahl313b9c32017-11-06 00:34:46 -0800183config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
184 bool "Enable use of 1st stage bootloader timing for NAND"
185 depends on NAND_ZYNQ
186 help
187 This flag prevent U-boot reconfigure NAND flash controller and reuse
188 the NAND timing from 1st stage bootloader.
189
Stefan Agner6120f752015-05-08 19:07:11 +0200190comment "Generic NAND options"
191
Miquel Raynal639aa982018-02-28 20:52:01 +0100192config SYS_NAND_BLOCK_SIZE
193 hex "NAND chip eraseblock size"
194 depends on ARCH_SUNXI
195 help
196 Number of data bytes in one eraseblock for the NAND chip on the
197 board. This is the multiple of NAND_PAGE_SIZE and the number of
198 pages.
199
200config SYS_NAND_PAGE_SIZE
201 hex "NAND chip page size"
202 depends on ARCH_SUNXI
203 help
204 Number of data bytes in one page for the NAND chip on the
205 board, not including the OOB area.
206
207config SYS_NAND_OOBSIZE
208 hex "NAND chip OOB size"
209 depends on ARCH_SUNXI
210 help
211 Number of bytes in the Out-Of-Band area for the NAND chip on
212 the board.
213
Stefan Agner6120f752015-05-08 19:07:11 +0200214# Enhance depends when converting drivers to Kconfig which use this config
215# option (mxc_nand, ndfc, omap_gpmc).
216config SYS_NAND_BUSWIDTH_16BIT
217 bool "Use 16-bit NAND interface"
Adam Ford5b7c9f02017-10-16 14:08:26 -0500218 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
Stefan Agner6120f752015-05-08 19:07:11 +0200219 help
220 Indicates that NAND device has 16-bit wide data-bus. In absence of this
221 config, bus-width of NAND device is assumed to be either 8-bit and later
222 determined by reading ONFI params.
223 Above config is useful when NAND device's bus-width information cannot
224 be determined from on-chip ONFI params, like in following scenarios:
225 - SPL boot does not support reading of ONFI parameters. This is done to
226 keep SPL code foot-print small.
227 - In current U-Boot flow using nand_init(), driver initialization
228 happens in board_nand_init() which is called before any device probe
229 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
230 not available while configuring controller. So a static CONFIG_NAND_xx
231 is needed to know the device's bus-width in advance.
232
Boris Brezillon05b769d2016-06-06 10:16:57 +0200233if SPL
234
235config SYS_NAND_U_BOOT_LOCATIONS
236 bool "Define U-boot binaries locations in NAND"
237 help
238 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
239 This option should not be enabled when compiling U-boot for boards
240 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
241 file.
242
Hans de Goede60b1b292015-08-21 21:49:51 +0200243config SYS_NAND_U_BOOT_OFFS
244 hex "Location in NAND to read U-Boot from"
Maxime Riparda15b6ea2017-02-27 18:22:09 +0100245 default 0x800000 if NAND_SUNXI
Boris Brezillon05b769d2016-06-06 10:16:57 +0200246 depends on SYS_NAND_U_BOOT_LOCATIONS
Hans de Goede60b1b292015-08-21 21:49:51 +0200247 help
248 Set the offset from the start of the nand where u-boot should be
249 loaded from.
250
Boris Brezillon4f238e72016-06-06 10:16:58 +0200251config SYS_NAND_U_BOOT_OFFS_REDUND
252 hex "Location in NAND to read U-Boot from"
253 default SYS_NAND_U_BOOT_OFFS
254 depends on SYS_NAND_U_BOOT_LOCATIONS
255 help
256 Set the offset from the start of the nand where the redundant u-boot
257 should be loaded from.
258
Adam Ford5b7c9f02017-10-16 14:08:26 -0500259config SPL_NAND_AM33XX_BCH
260 bool "Enables SPL-NAND driver which supports ELM based"
261 depends on NAND_OMAP_GPMC && !OMAP34XX
262 default y
263 help
264 Hardware ECC correction. This is useful for platforms which have ELM
265 hardware engine and use NAND boot mode.
266 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
267 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
268 SPL-NAND driver with software ECC correction support.
269
Masahiro Yamadad182d542014-10-03 19:21:04 +0900270config SPL_NAND_DENALI
271 bool "Support Denali NAND controller for SPL"
272 help
273 This is a small implementation of the Denali NAND controller
274 for use on SPL.
275
Adam Ford5b7c9f02017-10-16 14:08:26 -0500276config SPL_NAND_SIMPLE
277 bool "Use simple SPL NAND driver"
278 depends on !SPL_NAND_AM33XX_BCH
279 help
280 Support for NAND boot using simple NAND drivers that
281 expose the cmd_ctrl() interface.
Masahiro Yamadad182d542014-10-03 19:21:04 +0900282endif
283
Adam Ford42efb612017-08-07 17:37:18 -0400284endif # if NAND