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Pali Rohár248ef0a2012-10-29 07:54:01 +00001/*
2 * (C) Copyright 2011-2012
3 * Pali Rohár <pali.rohar@gmail.com>
4 *
5 * (C) Copyright 2010
6 * Alistair Buxton <a.j.buxton@gmail.com>
7 *
8 * Derived from Beagle Board code:
9 * (C) Copyright 2006-2008
10 * Texas Instruments.
11 * Richard Woodruff <r-woodruff2@ti.com>
12 * Syed Mohammed Khasim <x0khasim@ti.com>
13 *
14 * Configuration settings for the Nokia RX-51 aka N900.
15 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020016 * SPDX-License-Identifier: GPL-2.0+
Pali Rohár248ef0a2012-10-29 07:54:01 +000017 */
18
19#ifndef __CONFIG_H
20#define __CONFIG_H
21
Albert ARIBAUDbf9032a2016-01-27 08:46:11 +010022#define CONFIG_SYS_CACHELINE_SIZE 64
23
Pali Rohár248ef0a2012-10-29 07:54:01 +000024/*
25 * High Level Configuration Options
26 */
27
28#define CONFIG_OMAP /* in a TI OMAP core */
Pali Rohár248ef0a2012-10-29 07:54:01 +000029#define CONFIG_OMAP3430 /* which is in a 3430 */
30#define CONFIG_OMAP3_RX51 /* working with RX51 */
31#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
Lokesh Vutla56055052013-07-30 11:36:30 +053032#define CONFIG_OMAP_COMMON
Nishanth Menon53fee1e2015-03-09 17:12:09 -050033/* Common ARM Erratas */
34#define CONFIG_ARM_ERRATA_454179
35#define CONFIG_ARM_ERRATA_430973
36#define CONFIG_ARM_ERRATA_621766
Pali Rohár248ef0a2012-10-29 07:54:01 +000037
38#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
39
40/*
41 * Nokia X-Loader loading secondary image to address 0x80400000
42 * NOLO loading boot image to random place, so it doesn't really
43 * matter what we set this to. We have to copy u-boot to this address
44 */
45#define CONFIG_SYS_TEXT_BASE 0x80008000
46
47#define CONFIG_SDRC /* The chip has SDRC controller */
48
49#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050050#include <asm/arch/omap.h>
Pali Rohár248ef0a2012-10-29 07:54:01 +000051#include <asm/arch/mem.h>
52#include <linux/stringify.h>
53
54/*
55 * Display CPU and Board information
56 */
57#define CONFIG_DISPLAY_CPUINFO
58#define CONFIG_DISPLAY_BOARDINFO
59
60/* Clock Defines */
61#define V_OSCK 26000000 /* Clock output from T2 */
62#define V_SCLK (V_OSCK >> 1)
63
64#undef CONFIG_USE_IRQ /* no support for IRQs */
65#define CONFIG_MISC_INIT_R
66#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
67
68#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
69#define CONFIG_INITRD_TAG /* enable passing initrd */
70#define CONFIG_REVISION_TAG /* enable passing revision tag*/
71#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
72
73/*
74 * Size of malloc() pool
75 */
76#define CONFIG_ENV_SIZE (128 << 10)
77#define CONFIG_UBI_SIZE (512 << 10)
78#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
79 (128 << 10))
80
81/*
82 * Hardware drivers
83 */
84
85/*
86 * NS16550 Configuration
87 */
88#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
89
Pali Rohár248ef0a2012-10-29 07:54:01 +000090#define CONFIG_SYS_NS16550_SERIAL
91#define CONFIG_SYS_NS16550_REG_SIZE (-4)
92#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
93
94/*
95 * select serial console configuration
96 */
97#define CONFIG_CONS_INDEX 3
98#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
99#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */
100
101/* allow to overwrite serial and ethaddr */
102#define CONFIG_ENV_OVERWRITE
103#define CONFIG_BAUDRATE 115200
104#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
105#define CONFIG_MMC
106#define CONFIG_GENERIC_MMC
107#define CONFIG_OMAP_HSMMC
108#define CONFIG_DOS_PARTITION
109
110/* USB */
Paul Kocialkowskif34dfcb2015-08-04 17:04:06 +0200111#define CONFIG_USB_MUSB_UDC
112#define CONFIG_USB_MUSB_HCD
Pali Rohár248ef0a2012-10-29 07:54:01 +0000113#define CONFIG_USB_OMAP3
114#define CONFIG_TWL4030_USB
115
116/* USB device configuration */
117#define CONFIG_USB_DEVICE
118#define CONFIG_USBD_VENDORID 0x0421
119#define CONFIG_USBD_PRODUCTID 0x01c8
120#define CONFIG_USBD_MANUFACTURER "Nokia"
121#define CONFIG_USBD_PRODUCT_NAME "N900"
122
123#define CONFIG_SYS_CONSOLE_IS_IN_ENV
124#define CONFIG_SYS_NO_FLASH
125
126/* commands to include */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000127
128#define CONFIG_CMDLINE_EDITING /* add command line history */
129#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
130
Pali Rohár13eb3e42013-03-07 05:15:19 +0000131#define CONFIG_CMD_BOOTMENU /* ANSI terminal Boot Menu */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000132#define CONFIG_CMD_CLEAR /* ANSI terminal clear screen command */
133
134#ifdef ONENAND_SUPPORT
135
136#define CONFIG_CMD_ONENAND /* ONENAND support */
137#define CONFIG_CMD_MTDPARTS /* mtd parts support */
138
139#ifdef UBIFS_SUPPORT
140#define CONFIG_CMD_UBI /* UBI Support */
141#define CONFIG_CMD_UBIFS /* UBIFS Support */
142#endif
143
144#endif
145
Pali Rohár248ef0a2012-10-29 07:54:01 +0000146#define CONFIG_OMAP3_SPI
Heiko Schocherf53f2b82013-10-22 11:03:18 +0200147#define CONFIG_SYS_I2C
148#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
149#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
150#define CONFIG_SYS_I2C_OMAP34XX
Pali Rohár248ef0a2012-10-29 07:54:01 +0000151
152/*
153 * TWL4030
154 */
155#define CONFIG_TWL4030_POWER
156#define CONFIG_TWL4030_LED
157#define CONFIG_TWL4030_KEYPAD
158
159#define CONFIG_OMAP_GPIO
160#define GPIO_SLIDE 71
161
162/*
163 * Board ONENAND Info.
164 */
165
166#define PART1_NAME "bootloader"
167#define PART1_SIZE 128
168#define PART1_MULL 1024
169#define PART1_SUFF "k"
170#define PART1_OFFS 0x00000000
171#define PART1_MASK 0x00000003
172
173#define PART2_NAME "config"
174#define PART2_SIZE 384
175#define PART2_MULL 1024
176#define PART2_SUFF "k"
177#define PART2_OFFS 0x00020000
178#define PART2_MASK 0x00000000
179
180#define PART3_NAME "log"
181#define PART3_SIZE 256
182#define PART3_MULL 1024
183#define PART3_SUFF "k"
184#define PART3_OFFS 0x00080000
185#define PART3_MASK 0x00000000
186
187#define PART4_NAME "kernel"
188#define PART4_SIZE 2
189#define PART4_MULL 1024*1024
190#define PART4_SUFF "m"
191#define PART4_OFFS 0x000c0000
192#define PART4_MASK 0x00000000
193
194#define PART5_NAME "initfs"
195#define PART5_SIZE 2
196#define PART5_MULL 1024*1024
197#define PART5_SUFF "m"
198#define PART5_OFFS 0x002c0000
199#define PART5_MASK 0x00000000
200
201#define PART6_NAME "rootfs"
202#define PART6_SIZE 257280
203#define PART6_MULL 1024
204#define PART6_SUFF "k"
205#define PART6_OFFS 0x004c0000
206#define PART6_MASK 0x00000000
207
208#ifdef ONENAND_SUPPORT
209
Pali Rohár248ef0a2012-10-29 07:54:01 +0000210#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
211#define CONFIG_MTD_DEVICE
212#define CONFIG_MTD_PARTITIONS
213
214#ifdef UBIFS_SUPPORT
215#define CONFIG_RBTREE
216#define CONFIG_LZO
217#endif
218
219#define MTDIDS_DEFAULT "onenand0=onenand"
220#define MTDPARTS_DEFAULT "mtdparts=onenand:" \
221 __stringify(PART1_SIZE) PART1_SUFF "(" PART1_NAME ")ro," \
222 __stringify(PART2_SIZE) PART2_SUFF "(" PART2_NAME ")," \
223 __stringify(PART3_SIZE) PART3_SUFF "(" PART3_NAME ")," \
224 __stringify(PART4_SIZE) PART4_SUFF "(" PART4_NAME ")," \
225 __stringify(PART5_SIZE) PART5_SUFF "(" PART5_NAME ")," \
226 "-(" PART6_NAME ")"
227
228#endif
229
230/* Watchdog support */
231#define CONFIG_HW_WATCHDOG
232
233/*
234 * Framebuffer
235 */
236/* Video console */
237#define CONFIG_VIDEO
238#define CONFIG_CFB_CONSOLE
239#define CONFIG_CFB_CONSOLE_ANSI /* Enable ANSI escape codes in framebuffer */
240#define CONFIG_VIDEO_LOGO
241#define VIDEO_FB_16BPP_PIXEL_SWAP
242#define VIDEO_FB_16BPP_WORD_SWAP
243#define CONFIG_VIDEO_SW_CURSOR
244#define CONFIG_SPLASH_SCREEN
245
246/* functions for cfb_console */
247#define VIDEO_KBD_INIT_FCT rx51_kp_init()
248#define VIDEO_TSTC_FCT rx51_kp_tstc
249#define VIDEO_GETC_FCT rx51_kp_getc
250#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -0600251struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +0000252int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -0600253int rx51_kp_tstc(struct stdio_dev *sdev);
254int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +0000255#endif
256
257#ifndef MTDPARTS_DEFAULT
258#define MTDPARTS_DEFAULT
259#endif
260
261/* Environment information */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000262#define CONFIG_EXTRA_ENV_SETTINGS \
263 "mtdparts=" MTDPARTS_DEFAULT "\0" \
264 "usbtty=cdc_acm\0" \
265 "stdin=vga\0" \
266 "stdout=vga\0" \
267 "stderr=vga\0" \
268 "setcon=setenv stdin ${con};" \
269 "setenv stdout ${con};" \
270 "setenv stderr ${con}\0" \
271 "sercon=setenv con serial; run setcon\0" \
272 "usbcon=setenv con usbtty; run setcon\0" \
273 "vgacon=setenv con vga; run setcon\0" \
274 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
275 "switchmmc=mmc dev ${mmcnum}\0" \
276 "kernaddr=0x82008000\0" \
277 "initrdaddr=0x84008000\0" \
278 "scriptaddr=0x86008000\0" \
279 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
280 "${loadaddr} ${mmcfile}\0" \
281 "kernload=setenv loadaddr ${kernaddr};" \
282 "setenv mmcfile ${mmckernfile};" \
283 "run fileload\0" \
284 "initrdload=setenv loadaddr ${initrdaddr};" \
285 "setenv mmcfile ${mmcinitrdfile};" \
286 "run fileload\0" \
287 "scriptload=setenv loadaddr ${scriptaddr};" \
288 "setenv mmcfile ${mmcscriptfile};" \
289 "run fileload\0" \
290 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
291 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
292 "kernboot=echo Booting ${mmckernfile} from mmc " \
293 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
294 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
295 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
296 "attachboot=echo Booting attached kernel image ...;" \
297 "setenv setup_omap_atag 1;" \
298 "bootm ${attkernaddr};" \
299 "setenv setup_omap_atag\0" \
300 "trymmcscriptboot=if run switchmmc; then " \
301 "if run scriptload; then " \
302 "run scriptboot;" \
303 "fi;" \
304 "fi\0" \
305 "trymmckernboot=if run switchmmc; then " \
306 "if run kernload; then " \
307 "run kernboot;" \
308 "fi;" \
309 "fi\0" \
310 "trymmckerninitrdboot=if run switchmmc; then " \
311 "if run initrdload; then " \
312 "if run kernload; then " \
313 "run kerninitrdboot;" \
314 "fi;" \
315 "fi; " \
316 "fi\0" \
317 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
318 "setenv mmckernfile uImage; run trymmckernboot\0" \
319 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
320 "setenv mmcpart 2; run trymmcpartboot;" \
321 "setenv mmcpart 3; run trymmcpartboot;" \
322 "setenv mmcpart 4; run trymmcpartboot\0" \
323 "trymmcboot=if run switchmmc; then " \
324 "setenv mmctype fat;" \
325 "run trymmcallpartboot;" \
326 "setenv mmctype ext2;" \
327 "run trymmcallpartboot;" \
328 "setenv mmctype ext4;" \
329 "run trymmcallpartboot;" \
330 "fi\0" \
331 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
332 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000333 "menucmd=bootmenu\0" \
334 "bootmenu_0=Attached kernel=run attachboot\0" \
335 "bootmenu_1=Internal eMMC=run emmcboot\0" \
336 "bootmenu_2=External SD card=run sdboot\0" \
337 "bootmenu_3=U-Boot boot order=boot\0" \
338 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000339 ""
340
341#define CONFIG_PREBOOT \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000342 "setenv mmcnum 1; setenv mmcpart 1;" \
343 "setenv mmcscriptfile bootmenu.scr;" \
344 "if run switchmmc; then " \
345 "setenv mmcdone true;" \
346 "setenv mmctype fat;" \
347 "if run scriptload; then true; else " \
348 "setenv mmctype ext2;" \
349 "if run scriptload; then true; else " \
350 "setenv mmctype ext4;" \
351 "if run scriptload; then true; else " \
352 "setenv mmcdone false;" \
353 "fi;" \
354 "fi;" \
355 "fi;" \
356 "if ${mmcdone}; then " \
357 "run scriptboot;" \
358 "fi;" \
359 "fi;" \
360 "if run slide; then true; else " \
361 "setenv bootmenu_delay 0;" \
362 "setenv bootdelay 0;" \
363 "fi"
364
365#define CONFIG_POSTBOOTMENU \
366 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000367 "echo Extra commands:;" \
368 "echo run sercon - Use serial port for control.;" \
369 "echo run usbcon - Use usbtty for control.;" \
370 "echo run vgacon - Use framebuffer/keyboard.;" \
371 "echo run sdboot - Boot from SD card slot.;" \
372 "echo run emmcboot - Boot internal eMMC memory.;" \
373 "echo run attachboot - Boot attached kernel image.;" \
374 "echo"
375
376#define CONFIG_BOOTCOMMAND \
377 "run sdboot;" \
378 "run emmcboot;" \
379 "run attachboot;" \
380 "echo"
381
Pali Rohár13eb3e42013-03-07 05:15:19 +0000382#define CONFIG_MENU
383#define CONFIG_MENU_SHOW
384
Pali Rohár248ef0a2012-10-29 07:54:01 +0000385/*
386 * Miscellaneous configurable options
387 */
388#define CONFIG_SYS_LONGHELP /* undef to save memory */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000389#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
390/* Print Buffer Size */
391#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
392 sizeof(CONFIG_SYS_PROMPT) + 16)
393#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
394/* Boot Argument Buffer Size */
395#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
396
397#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
398#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/
399
400/* default load address */
401#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
402
403/*
404 * OMAP3 has 12 GP timers, they can be driven by the system clock
405 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
406 * This rate is divided by a local divisor.
407 */
408#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
409#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000410
411/*
412 * Stack sizes
413 *
414 * The stack sizes are set up in start.S using the settings below
415 */
416#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
417
418/*
419 * Physical Memory Map
420 */
421#define CONFIG_NR_DRAM_BANKS 2
422#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
423
424/*
425 * FLASH and environment organization
426 */
427
428#define CONFIG_ENV_IS_NOWHERE
429
430#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
431#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
432#define CONFIG_SYS_INIT_RAM_SIZE 0x800
433#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
434 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
435
436/*
437 * Attached kernel image
438 */
439
440#define SDRAM_SIZE 0x10000000 /* 256 MB */
441#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
442
443#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
444#define KERNEL_OFFSET 0x40000 /* 256 kB */
445#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
446#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
447
448/* Reserve protected RAM for attached kernel */
449#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
450
451#endif /* __CONFIG_H */