arch/arm/dts/mt7988-rfb.dts

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2022 MediaTek Inc.
 * Author: Sam Shih <sam.shih@mediatek.com>
 */

/dts-v1/;
#include "mt7988.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "mt7988-rfb";
	compatible = "mediatek,mt7988-rfb";

	chosen {
		stdout-path = &uart0;
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0 0x40000000 0 0x10000000>;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-1.8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};
};

&uart0 {
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	status = "okay";
};

&eth0 {
	status = "okay";
	phy-mode = "usxgmii";
	mediatek,switch = "mt7988";

	fixed-link {
		speed = <10000>;
		full-duplex;
		pause;
	};
};

&pcie0 {
	status = "okay";
};

&pcie1 {
	status = "okay";
};

/* PCIE2 not working in u-boot */
&pcie2 {
	status = "disabled";
};

/* PCIE3 not working in u-boot */
&pcie3 {
	status = "disabled";
};

&pinctrl {
	i2c1_pins: i2c1-pins {
		mux {
			function = "i2c";
			groups = "i2c1_0";
		};
	};

	pwm_pins: pwm-pins {
		mux {
			function = "pwm";
			groups = "pwm0", "pwm1", "pwm2", "pwm3", "pwm4",
				 "pwm5", "pwm6", "pwm7";
		};
	};

	spi0_pins: spi0-pins {
		mux {
			function = "spi";
			groups = "spi0", "spi0_wp_hold";
		};
	};

	spi2_pins: spi2-pins {
		mux {
			function = "spi";
			groups = "spi2", "spi2_wp_hold";
		};
	};

	mmc0_pins_default: mmc0default {
		mux {
			function = "flash";
			groups =  "emmc_51";
		};

		conf-cmd-dat {
			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
			input-enable;
		};

		conf-clk {
			pins = "EMMC_CK";
		};

		conf-dsl {
			pins = "EMMC_DSL";
		};

		conf-rst {
			pins = "EMMC_RSTB";
		};
	};
};

&pwm {
	pinctrl-names = "default";
	pinctrl-0 = <&pwm_pins>;
	status = "okay";
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
	must_tx;
	enhance_timing;
	dma_ext;
	ipm_design;
	support_quad;
	tick_dly = <2>;
	sample_sel = <0>;

	spi_nand@0 {
		compatible = "spi-nand";
		reg = <0>;
		spi-max-frequency = <52000000>;
		spi-rx-bus-width = <4>;
		spi-tx-bus-width = <4>;
	};
};

&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi2_pins>;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
	must_tx;
	enhance_timing;
	dma_ext;
	ipm_design;
	support_quad;
	tick_dly = <2>;
	sample_sel = <0>;

	spi_nor@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <52000000>;
		spi-rx-bus-width = <4>;
		spi-tx-bus-width = <4>;
	};
};

&mmc0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins_default>;
	max-frequency = <52000000>;
	bus-width = <8>;
	cap-mmc-highspeed;
	cap-mmc-hw-reset;
	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&reg_1p8v>;
	non-removable;
	status = "okay";
};