blob: 88839a6e561ac070caf5f22514a37368f9a0bc35 [file] [log] [blame]
Marcel Ziswiler36a439d2022-02-07 11:54:13 +01001/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright 2022 Toradex
4 */
5
6#ifndef __VERDIN_IMX8MP_H
7#define __VERDIN_IMX8MP_H
8
9#include <asm/arch/imx-regs.h>
10#include <linux/sizes.h>
11
Tom Rini6a5dccc2022-11-16 13:10:41 -050012#define CFG_SYS_UBOOT_BASE \
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010013 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
14
15#ifdef CONFIG_SPL_BUILD
16/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010017
18/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
19#define CONFIG_MALLOC_F_ADDR 0x184000
20/* For RAW image gives a error info not panic */
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010021
22#define CONFIG_POWER_PCA9450
23
24#define CONFIG_SYS_I2C
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010025#endif /* CONFIG_SPL_BUILD */
26
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010027#define MEM_LAYOUT_ENV_SETTINGS \
Marcel Ziswiler82022f92022-08-22 15:06:00 +020028 "fdt_addr_r=0x50200000\0" \
29 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
30 "kernel_comp_addr_r=0x40200000\0" \
Marcel Ziswiler48646d82022-09-22 23:28:32 +020031 "kernel_comp_size=0x08000000\0" \
Marcel Ziswiler82022f92022-08-22 15:06:00 +020032 "ramdisk_addr_r=0x50300000\0" \
33 "scriptaddr=0x50280000\0"
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010034
35/* Enable Distro Boot */
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010036#define BOOT_TARGET_DEVICES(func) \
37 func(MMC, mmc, 1) \
38 func(MMC, mmc, 2) \
39 func(DHCP, dhcp, na)
40#include <config_distro_bootcmd.h>
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010041
42#if defined(CONFIG_TDX_EASY_INSTALLER)
43# define BOOT_SCRIPT "boot-tezi.scr"
44#else
45# define BOOT_SCRIPT "boot.scr"
46#endif
47
48/* Initial environment variables */
49#define CONFIG_EXTRA_ENV_SETTINGS \
50 BOOTENV \
51 MEM_LAYOUT_ENV_SETTINGS \
52 "bootcmd_mfg=fastboot 0\0" \
53 "boot_file=Image\0" \
54 "boot_scripts=" BOOT_SCRIPT "\0" \
55 "boot_script_dhcp=" BOOT_SCRIPT "\0" \
56 "console=ttymxc2\0" \
57 "fdt_board=dev\0" \
58 "initrd_addr=0x43800000\0" \
59 "initrd_high=0xffffffffffffffff\0" \
Philippe Schenker827da102022-05-25 09:55:02 +020060 "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010061 "consoleblank=0 earlycon\0" \
62 "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
63 "if test \"$confirm\" = \"y\"; then " \
64 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
65 "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
66 "${blkcnt}; fi\0"
67
Tom Rini6a5dccc2022-11-16 13:10:41 -050068#define CFG_SYS_INIT_RAM_ADDR 0x40000000
69#define CFG_SYS_INIT_RAM_SIZE SZ_512K
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010070
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010071/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
Tom Rinibb4dd962022-11-16 13:10:37 -050072#define CFG_SYS_SDRAM_BASE 0x40000000
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010073#define PHYS_SDRAM 0x40000000
74#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
75#define PHYS_SDRAM_2 0x100000000
76#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
77
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010078#endif /* __VERDIN_IMX8MP_H */