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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Mingkai Hueee86ff2015-10-26 19:47:52 +08002/*
3 * Copyright (C) 2015 Freescale Semiconductor
Yangbo Lubb32e682021-06-03 10:51:19 +08004 * Copyright 2019-2021 NXP
Mingkai Hueee86ff2015-10-26 19:47:52 +08005 */
6
7#ifndef __LS1043A_COMMON_H
8#define __LS1043A_COMMON_H
9
Sumit Garg2a2857b2017-03-30 09:52:38 +053010/* SPL build */
11#ifdef CONFIG_SPL_BUILD
12#define SPL_NO_FMAN
13#define SPL_NO_DSPI
14#define SPL_NO_PCIE
15#define SPL_NO_ENV
16#define SPL_NO_MISC
17#define SPL_NO_USB
18#define SPL_NO_SATA
19#define SPL_NO_QE
20#define SPL_NO_EEPROM
21#endif
22#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
23#define SPL_NO_MMC
24#endif
Yangbo Lu83c4ece2017-09-15 09:51:58 +080025#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
Sumit Garg2a2857b2017-03-30 09:52:38 +053026#define SPL_NO_IFC
27#endif
28
Bharat Bhushan882b6322017-03-22 12:06:27 +053029#include <asm/arch/stream_id_lsch2.h>
Mingkai Hueee86ff2015-10-26 19:47:52 +080030#include <asm/arch/config.h>
Mingkai Hueee86ff2015-10-26 19:47:52 +080031
32/* Link Definitions */
Mingkai Hueee86ff2015-10-26 19:47:52 +080033
Mingkai Hueee86ff2015-10-26 19:47:52 +080034#define CONFIG_VERY_BIG_RAM
Tom Rini6a5dccc2022-11-16 13:10:41 -050035#define CFG_SYS_DDR_SDRAM_BASE 0x80000000
Tom Rini376b88a2022-10-28 20:27:13 -040036#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
Tom Rini6a5dccc2022-11-16 13:10:41 -050037#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
38#define CFG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Mingkai Hueee86ff2015-10-26 19:47:52 +080039
Michael Wallef056e0f2020-06-01 21:53:26 +020040#define CPU_RELEASE_ADDR secondary_boot_addr
Hou Zhiqiangc7098fa2015-10-26 19:47:57 +080041
Mingkai Hueee86ff2015-10-26 19:47:52 +080042/* Serial Port */
Tom Rinidf6a2152022-11-16 13:10:28 -050043#define CFG_SYS_NS16550_CLK (get_serial_clock())
Mingkai Hueee86ff2015-10-26 19:47:52 +080044
Gong Qianyuf671f6c2015-10-26 19:47:56 +080045/* SD boot SPL */
46#ifdef CONFIG_SD_BOOT
Udit Agarwal22ec2382019-11-07 16:11:32 +000047#ifdef CONFIG_NXP_ESBC
Ruchika Guptad6b89202017-04-17 18:07:17 +053048#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
49/*
50 * HDR would be appended at end of image and copied to DDR along
51 * with U-Boot image. Here u-boot max. size is 512K. So if binary
52 * size increases then increase this size in case of secure boot as
53 * it uses raw u-boot image instead of fit image.
54 */
Udit Agarwal22ec2382019-11-07 16:11:32 +000055#endif /* ifdef CONFIG_NXP_ESBC */
Gong Qianyuf671f6c2015-10-26 19:47:56 +080056#endif
57
Gong Qianyu8168a0f2015-10-26 19:47:53 +080058/* NAND SPL */
59#ifdef CONFIG_NAND_BOOT
Tom Rinib4213492022-11-12 17:36:51 -050060#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
61#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
Ruchika Guptaba688752017-04-17 18:07:18 +053062
Udit Agarwal22ec2382019-11-07 16:11:32 +000063#ifdef CONFIG_NXP_ESBC
Ruchika Guptaba688752017-04-17 18:07:18 +053064#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
Udit Agarwal22ec2382019-11-07 16:11:32 +000065#endif /* ifdef CONFIG_NXP_ESBC */
Ruchika Guptaba688752017-04-17 18:07:18 +053066
67#ifdef CONFIG_U_BOOT_HDR_SIZE
68/*
69 * HDR would be appended at end of image and copied to DDR along
70 * with U-Boot image. Here u-boot max. size is 512K. So if binary
71 * size increases then increase this size in case of secure boot as
72 * it uses raw u-boot image instead of fit image.
73 */
Ruchika Guptaba688752017-04-17 18:07:18 +053074#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
75
Gong Qianyu8168a0f2015-10-26 19:47:53 +080076#endif
77
Biwen Li46de4002021-02-05 19:01:56 +080078/* GPIO */
Biwen Li46de4002021-02-05 19:01:56 +080079
Mingkai Hueee86ff2015-10-26 19:47:52 +080080/* IFC */
Sumit Garg2a2857b2017-03-30 09:52:38 +053081#ifndef SPL_NO_IFC
Rajesh Bhagatb89aed42018-11-05 18:02:44 +000082#if defined(CONFIG_TFABOOT) || \
83 (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
Mingkai Hueee86ff2015-10-26 19:47:52 +080084/*
Tom Rini6a5dccc2022-11-16 13:10:41 -050085 * CFG_SYS_FLASH_BASE has the final address (core view)
86 * CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
87 * CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
Simon Glass72cc5382022-10-20 18:22:39 -060088 * CONFIG_TEXT_BASE is linked to 0x60000000 for booting
Mingkai Hueee86ff2015-10-26 19:47:52 +080089 */
Tom Rini6a5dccc2022-11-16 13:10:41 -050090#define CFG_SYS_FLASH_BASE 0x60000000
91#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE
92#define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
Mingkai Hueee86ff2015-10-26 19:47:52 +080093
Masahiro Yamada8cea9b52017-02-11 22:43:54 +090094#ifdef CONFIG_MTD_NOR_FLASH
Mingkai Hueee86ff2015-10-26 19:47:52 +080095#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
96#endif
Gong Qianyu760df892016-01-25 15:16:06 +080097#endif
Sumit Garg2a2857b2017-03-30 09:52:38 +053098#endif
Mingkai Hueee86ff2015-10-26 19:47:52 +080099
100/* I2C */
Mingkai Hueee86ff2015-10-26 19:47:52 +0800101
Gong Qianyu51c18dc2016-01-25 15:16:05 +0800102/* DSPI */
Gong Qianyu51c18dc2016-01-25 15:16:05 +0800103
Shaohui Xie04643262015-10-26 19:47:54 +0800104/* FMan ucode */
Sumit Garg2a2857b2017-03-30 09:52:38 +0530105#ifndef SPL_NO_FMAN
Shaohui Xie04643262015-10-26 19:47:54 +0800106#ifdef CONFIG_SYS_DPAA_FMAN
Tom Rini6a5dccc2022-11-16 13:10:41 -0500107#define CFG_SYS_FM_MURAM_SIZE 0x60000
Shaohui Xie04643262015-10-26 19:47:54 +0800108#endif
Sumit Garg2a2857b2017-03-30 09:52:38 +0530109#endif
Shaohui Xie04643262015-10-26 19:47:54 +0800110
Mingkai Hueee86ff2015-10-26 19:47:52 +0800111/* Miscellaneous configurable options */
Mingkai Hueee86ff2015-10-26 19:47:52 +0800112
Mingkai Hueee86ff2015-10-26 19:47:52 +0800113#define HWCONFIG_BUFFER_SIZE 128
114
Sumit Garg2a2857b2017-03-30 09:52:38 +0530115#ifndef SPL_NO_MISC
Shengzhou Liu9d662542017-06-08 15:59:48 +0800116#define BOOT_TARGET_DEVICES(func) \
117 func(MMC, mmc, 0) \
Mian Yousaf Kaukab6519df72019-01-29 16:38:40 +0100118 func(USB, usb, 0) \
119 func(DHCP, dhcp, na)
Shengzhou Liu9d662542017-06-08 15:59:48 +0800120#include <config_distro_bootcmd.h>
Shengzhou Liu9d662542017-06-08 15:59:48 +0800121
Mingkai Hueee86ff2015-10-26 19:47:52 +0800122/* Initial environment variables */
123#define CONFIG_EXTRA_ENV_SETTINGS \
124 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
Mingkai Hueee86ff2015-10-26 19:47:52 +0800125 "fdt_high=0xffffffffffffffff\0" \
126 "initrd_high=0xffffffffffffffff\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530127 "kernel_addr=0x61000000\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800128 "scriptaddr=0x80000000\0" \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530129 "scripthdraddr=0x80080000\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800130 "fdtheader_addr_r=0x80100000\0" \
131 "kernelheader_addr_r=0x80200000\0" \
132 "kernel_addr_r=0x81000000\0" \
Wen He335b3862018-11-20 16:55:25 +0800133 "kernel_start=0x1000000\0" \
134 "kernelheader_start=0x800000\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800135 "fdt_addr_r=0x90000000\0" \
136 "load_addr=0xa0000000\0" \
Manish Tomar8d388012020-11-05 14:08:55 +0530137 "kernelheader_addr=0x60600000\0" \
Qianyu Gong2758edf2016-03-15 16:35:57 +0800138 "kernel_size=0x2800000\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530139 "kernelheader_size=0x40000\0" \
Shengzhou Liu42862752017-11-09 17:57:55 +0800140 "kernel_addr_sd=0x8000\0" \
141 "kernel_size_sd=0x14000\0" \
Manish Tomar8d388012020-11-05 14:08:55 +0530142 "kernelhdr_addr_sd=0x3000\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530143 "kernelhdr_size_sd=0x10\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800144 "console=ttyS0,115200\0" \
York Sunf7eed6b2017-09-28 08:42:16 -0700145 "boot_os=y\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800146 BOOTENV \
147 "boot_scripts=ls1043ardb_boot.scr\0" \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530148 "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800149 "scan_dev_for_boot_part=" \
150 "part list ${devtype} ${devnum} devplist; " \
151 "env exists devplist || setenv devplist 1; " \
152 "for distro_bootpart in ${devplist}; do " \
153 "if fstype ${devtype} " \
154 "${devnum}:${distro_bootpart} " \
155 "bootfstype; then " \
156 "run scan_dev_for_boot; " \
157 "fi; " \
158 "done\0" \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530159 "boot_a_script=" \
160 "load ${devtype} ${devnum}:${distro_bootpart} " \
161 "${scriptaddr} ${prefix}${script}; " \
162 "env exists secureboot && load ${devtype} " \
163 "${devnum}:${distro_bootpart} " \
Vinitha V Pillai25355ec2019-04-23 05:52:17 +0000164 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
165 "env exists secureboot " \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530166 "&& esbc_validate ${scripthdraddr};" \
167 "source ${scriptaddr}\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800168 "qspi_bootcmd=echo Trying load from qspi..;" \
169 "sf probe && sf read $load_addr " \
Wen Hecabe55c2019-11-14 15:08:15 +0800170 "$kernel_start $kernel_size; env exists secureboot " \
171 "&& sf read $kernelheader_addr_r $kernelheader_start " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530172 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
173 "bootm $load_addr#$board\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800174 "nor_bootcmd=echo Trying load from nor..;" \
175 "cp.b $kernel_addr $load_addr " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530176 "$kernel_size; env exists secureboot " \
177 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
178 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
179 "bootm $load_addr#$board\0" \
Wen He335b3862018-11-20 16:55:25 +0800180 "nand_bootcmd=echo Trying load from NAND..;" \
181 "nand info; nand read $load_addr " \
182 "$kernel_start $kernel_size; env exists secureboot " \
183 "&& nand read $kernelheader_addr_r $kernelheader_start " \
184 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
185 "bootm $load_addr#$board\0" \
Shengzhou Liu42862752017-11-09 17:57:55 +0800186 "sd_bootcmd=echo Trying load from SD ..;" \
187 "mmcinfo; mmc read $load_addr " \
188 "$kernel_addr_sd $kernel_size_sd && " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530189 "env exists secureboot && mmc read $kernelheader_addr_r " \
190 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
191 " && esbc_validate ${kernelheader_addr_r};" \
Shengzhou Liu42862752017-11-09 17:57:55 +0800192 "bootm $load_addr#$board\0"
193
Wenbin Song1738ca72016-07-21 18:55:16 +0800194
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000195#ifdef CONFIG_TFABOOT
196#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
197 "env exists secureboot && esbc_halt;"
198#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
199 "env exists secureboot && esbc_halt;"
200#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
201 "env exists secureboot && esbc_halt;"
Pankit Garg69210722018-12-27 04:37:53 +0000202#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
203 "env exists secureboot && esbc_halt;"
Sumit Garg2a2857b2017-03-30 09:52:38 +0530204#endif
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000205#endif
Mingkai Hueee86ff2015-10-26 19:47:52 +0800206
Simon Glass89e0a3a2017-05-17 08:23:10 -0600207#include <asm/arch/soc.h>
208
Mingkai Hueee86ff2015-10-26 19:47:52 +0800209#endif /* __LS1043A_COMMON_H */